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Pb1200 does have SMC 91C111 Ethernet chip on board but the platform code
did not register it, so one couldn't mount NFS...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The on-board SMC 91C111 chip only decodes 16 bytes of memory (obviously, it
can not decode a whole megabyte starting from address 0x19000300).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Move the code registering the Alchemy UART platform devices from
drivers/serial/ to its proper place, into the Alchemy platform code. Fix
the related Kconfig entry, while at it...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Go thru the Alchemy code and hunt down every unneeded #include, #define, and
extern (some of which refer to already long dead functions).
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Since the commit 91a2fcc88634663e9e13dcdfad0e4a860e64aeee ([MIPS]
Consolidate all variants of MIPS cp0 timer interrupt handlers) removed the
Alchemy specific timer handler, 'r4k_offset' and 'r4k_cur' variables became
practically useless, so get rid of them at last, renaming cal_r4off()
function into calc_clock() and making it return CPU frequency. Also, make
'no_au1xxx_32khz' variable static...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Defer the unmasking of the count/compare interrupt (IRQ5) till the
clockevent driver initialization:
- only enable the cascaded IRQs 0 thru 4 in arch_init_irq(); kill the
ALLINTS macro -- this change is blessed by AMD as I saw it in their own
patch; :-)
- do not force IRQ5 enabled in plat_time_init() if PM is enabled and there's
no 32 KHz crystal.
Update the copyrights (taking into account my prior changes), also removing
Pete Popov's old email...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The header files for the Pb1200/DBAu1200 boards have wrong definition for the
IDE interface's decoded range length -- it should be 512 bytes according to
what the IDE driver does. In addition, the IDE platform device claims 1 byte
too many for its memory resource -- fix the platform code and the IDE driver
in accordance.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This patch fixes the compilation of the Au1000 XSS1500
board setup and irqmap code.
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Work around the CPU clock miscalculation on Au1000DA/HA/HB due the
sys_cpupll register being write-only, i.e. actually do what the comment
before cal_r4off() function advertised for years but the code failed at.
This is achieved by just giving user a chance to define the clock
explicitly in the board config. via CONFIG_SOC_AU1000_FREQUENCY option,
defaulting to 396 MHz if the option is not given...
The patch is based on the AMD's big unpublished patch, the issue seems to
be an undocumented errata (or feature :-)...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
0 is a valid device id (DSCR_CMD0_UART0_TX), so we can't use it to mark
an empty entry in the device table. Use ~0 instead and search for id ~0
when looking for a free entry.
Signed-off-by: Wolfgang Ocker <weo@reccoware.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch adds support for the GPIO connected system button on the MTX-1
boards. Default configuration is updated accordingly.
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Removed unused mips_machtype. These are only set but not used.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Convert the i2c-au1550 bus driver to platform driver, and
register a platform device for the Alchemy Db/Pb series of
boards.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
WARNING: vmlinux.o(.text+0x1ca608): Section mismatch: reference to
.init.text: add_wired_entry (between 'config_access' and 'config_read')
by refactoring the code calling add_wired_entry() from config_access() to
a separate function which is called from aau1x_pci_setup(). While at it:
- make some unnecassarily global variables 'static';
- fix the letter case, whitespace, etc. in the comments...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
the PCI specific code in this function doesn't check for the address range
being under the upper bound of the PCI memory window correctly -- fix this,
somewhat beautifying the code around the check, while at it...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
... by getting the PCI resources back into the 32-bit range -- there's no
need therefore for CONFIG_RESOURCES_64BIT either. This makes Alchemy PCI
work again while currently the kernel skips the bus scan.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Do what the commits commits f3e8d1da389fe2e514e31f6e93c690c8e1243849 and
9d360ab4a7568a8d177280f651a8a772ae52b9b9 failed to achieve -- actually
convert the Alchemy code to irq_cpu.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Fix havoc wrought by commit 56f621c7f6f735311eed3f36858b402013023c18 --
au_ffs() and ffs() are equivalent, that patch should have just replaced one
with another. Now replace ffs() with __ffs() which returns an unbiased bit
number.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all. This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/au1000/pb1200/irqmap.c:101: warning: ignoring return value of 'request_irq', declared with attribute warn_unused_result
And while at it a few coding style cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch separates the platform devices registration for the MTX-1
specific devices: GPIO leds and watchdog.
[Minor fixup and formatting change -- Ralf]
Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The old plat_timer_setup hook is no longer getting called so the Alchemy
time initialization was getting skipped.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
remove asm/bitops.h includes
including asm/bitops directly may cause compile errors. don't include it
and include linux/bitops instead. next patch will deny including asm header
directly.
Cc: Adrian Bunk <bunk@kernel.org>
Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Update AU1000 get_ethernet_addr().
Three functions were brought together in one.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Hard to follow who is pointing what to where and why so it's simply getting
in the way of the time code renovation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This has not been any serious user of this ill conceived thing since the
original invention in like '95.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
