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Add DT node for the single USB subsystem in main dtsi file.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Link: https://lore.kernel.org/r/20210317043007.18272-2-a-govindraju@ti.com
Add pinmux details and device tree node for the EEPROM attached to SPI0
module in main domain.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210309162315.22743-1-a-govindraju@ti.com
TI J7200 has the Cadence OSPI controller for interfacing with OSPI
flashes. Add its node to allow using SPI flashes.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210305153926.3479-4-p.yadav@ti.com
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the
frequency to 25 MHz. This is the frequency that the flash has been
successfully tested with in Octal DTR mode. The total performance should
still increase since 8D-8D-8D mode should be at least twice as fast as
1S-1S-8S mode.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210305153926.3479-3-p.yadav@ti.com
Set the Tx bus width to 8 so 8D-8D-8D mode can be selected. Change the
frequency to 25 MHz. This is the frequency that the flash has been
successfully tested with in Octal DTR mode. The total performance should
still increase since 8D-8D-8D mode should be at least twice as fast as
1S-1S-8S mode.
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210305153926.3479-2-p.yadav@ti.com
According to latest errata of J721e [1], HS400 mode is not supported
in MMCSD0 subsystem (i2024) and SDR104 mode is not supported in MMCSD1/2
subsystems (i2090). Therefore, replace mmc-hs400-1_8v with mmc-hs200-1_8v
in MMCSD0 subsystem and add a sdhci mask to disable SDR104 speed mode.
Also, update the itap delay values for all the MMCSD subsystems according
the latest J721e data sheet[2]
[1] - https://www.ti.com/lit/er/sprz455/sprz455.pdf
[2] - https://www.ti.com/lit/ds/symlink/tda4vm.pdf
Fixes: cd48ce86a4d0 ("arm64: dts: ti: k3-j721e-common-proc-board: Add support for SD card UHS modes")
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210305054104.10153-1-a-govindraju@ti.com
Add the DT entry for a watchdog based on RTI1.
On SR1.0 silicon, it requires additional firmware on the MCU R5F cores
to handle the expiry, e.g. https://github.com/siemens/k3-rti-wdt. As
this firmware will also lock the power domain to protect it against
premature shutdown, mark it shared.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
Link: https://lore.kernel.org/r/279c20fa-6e5e-4f88-9cd1-f76297a28a19@web.de
Add the DT nodes for the ICSSG0 and ICSSG1 processor subsystems that are
present on the K3 J721E SoCs. The two ICSSGs are identical to each other
for the most part, with the ICSSG1 supporting slightly enhanced features
for supporting SGMII PRU Ethernet. Each ICSSG instance is represented by
a PRUSS subsystem node and other child nodes. These nodes are enabled by
default.
The ICSSGs on K3 J721E SoCs are revised versions of the ICSSG on the first
AM65x SR1.0 SoCs. The PRU IRAMs are slightly smaller, and the IP includes
two new auxiliary PRU cores called Tx_PRUs. The Tx_PRUs have 6 KB of IRAMs
and leverage the same host interrupts as the regular PRU cores. All The
ICSSG host interrupts intended towards the main Arm core are also shared
with other processors on the SoC, and can be partitioned as per system
integration needs.
The ICSSG subsystem node contains the entire address space. The various
sub-modules of the ICSSG are represented as individual child nodes (so
platform devices themselves) of the PRUSS subsystem node. These include
the two PRU cores, two RTU cores, two Tx_PRU cores and the interrupt
controller. All the Data RAMs are represented within a child node of
its own named 'memories' without any compatible. The Real Time Media
Independent Interface controller (MII_RT), the Gigabit capable MII_G_RT
and the CFG sub-module are represented as syscon nodes. The ICSSG CFG
sub-module provides two internal clock muxes, and these are represented
as children of the CFG child node 'clocks' by the 'coreclk-mux' and
iepclk-mux' clk nodes. The default parents for these mux clocks are also
defined using the assigned-clock-parents property.
The DT nodes use all standard properties. The regs property in the
PRU/RTU/Tx_PRU nodes define the addresses for the Instruction RAM, the
Debug and Control sub-modules for that PRU core. The firmware for each
PRU/RTU/Tx_PRU core is defined through a 'firmware-name' property.
The default names for the firmware images for each PRU, RTU and Tx_PRU
cores are defined as follows (these can be adjusted either in derivative
board dts files or through sysfs at runtime if required):
ICSSG0 PRU0 Core : j7-pru0_0-fw ; PRU1 Core : j7-pru0_1-fw
ICSSG0 RTU0 Core : j7-rtu0_0-fw ; RTU1 Core : j7-rtu0_1-fw
ICSSG0 Tx_PRU0 Core : j7-txpru0_0-fw ; Tx_PRU1 Core : j7-txpru0_1-fw
ICSSG1 PRU0 Core : j7-pru1_0-fw ; PRU1 Core : j7-pru1_1-fw
ICSSG1 RTU0 Core : j7-rtu1_0-fw ; RTU1 Core : j7-rtu1_1-fw
ICSSG1 Tx_PRU0 Core : j7-txpru1_0-fw ; Tx_PRU1 Core : j7-txpru1_1-fw
Note:
1. The ICSSG INTC on J721E SoCs share all the host interrupts with other
processors, so use the 'ti,irqs-reserved' property in derivative board
dts files _if_ any of them should not be handled by the host OS.
2. There are few more sub-modules like the Industrial Ethernet Peripherals
(IEPs), MDIO, PWM, UART that do not have bindings and so will be added
in the future.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210304160712.8452-3-s-anna@ti.com
Add the DT nodes for the ICSSG0, ICSSG1 and ICSSG2 processor subsystems
that are present on the K3 AM65x SoCs. The three ICSSGs are identical
to each other for the most part, with the ICSSG2 supporting slightly
enhanced features for supporting SGMII PRU Ethernet. Each ICSSG instance
is represented by a PRUSS subsystem node. These nodes are enabled by
default.
The ICSSGs on K3 AM65x SoCs are super-sets of the PRUSS on the AM57xx/
6AK2G SoCs except for larger Shared Data RAM and the lack of a PRU-ICSS
crossbar. They include two auxiliary PRU cores called RTUs and few other
additional sub-modules. The interrupt integration is also different on
the K3 AM65x SoCs and are propagated through various SoC-level Interrupt
Router and Interrupt Aggregator blocks. The AM65x SR2.0 SoCs have a
revised ICSSG IP that is based off the subsequent IP used on J721E SoCs,
and has two new auxiliary PRU cores called Tx_PRUs. The Tx_PRUs have 6 KB
of IRAMs and leverage the same host interrupts as the regular PRU cores.
The Broadside (BS) RAM within each core is also sized differently w.r.t
SR1.0.
The ICSSG subsystem node contains the entire address space. The various
sub-modules of the ICSSG are represented as individual child nodes (so
platform devices themselves) of the PRUSS subsystem node. These include
the various PRU cores and the interrupt controller. All the Data RAMs
are represented within a child node of its own named 'memories' without
any compatible. The Real Time Media Independent Interface controllers
(MII_RT and MII_G_RT), and the CFG sub-module are represented as syscon
nodes. The ICSSG CFG module has clock muxes for IEP clock and CORE clock,
these clk nodes are added under the CFG child node 'clocks'. The default
parents for these mux clocks are also assigned.
The DT nodes use all standard properties. The regs property in the
PRU/RTU/Tx_PRU nodes define the addresses for the Instruction RAM, the
Debug and Control sub-modules for that PRU core. The firmware for each
PRU/RTU/Tx_PRU core is defined through a 'firmware-name' property.
The default names for the firmware images for each PRU, RTU and Tx_PRU
cores are defined as follows (these can be adjusted either in derivative
board dts files or through sysfs at runtime if required):
ICSSG0 PRU0 Core : am65x-pru0_0-fw ; PRU1 Core : am65x-pru0_1-fw
ICSSG0 RTU0 Core : am65x-rtu0_0-fw ; RTU1 Core : am65x-rtu0_1-fw
ICSSG0 Tx_PRU0 Core : am65x-txpru0_0-fw ; Tx_PRU1 Core : am65x-txpru0_1-fw
ICSSG1 PRU0 Core : am65x-pru1_0-fw ; PRU1 Core : am65x-pru1_1-fw
ICSSG1 RTU0 Core : am65x-rtu1_0-fw ; RTU1 Core : am65x-rtu1_1-fw
ICSSG1 Tx_PRU0 Core : am65x-txpru1_0-fw ; Tx_PRU1 Core : am65x-txpru1_1-fw
ICSSG2 PRU0 Core : am65x-pru2_0-fw ; PRU1 Core : am65x-pru2_1-fw
ICSSG2 RTU0 Core : am65x-rtu2_0-fw ; RTU1 Core : am65x-rtu2_1-fw
ICSSG2 Tx_PRU0 Core : am65x-txpru2_0-fw ; Tx_PRU1 Core : am65x-txpru2_1-fw
Note:
1. The ICSSG nodes are all added as per the SR2.0 device. Any sub-module IP
differences need to be handled within the driver using SoC device match
logic or separate dts/overlay files (if needs to be supported) with the
Tx_PRU nodes expected to be disabled at the minimum.
2. The ICSSG INTC on AM65x SoCs share 5, 6, 7 host interrupts with other
processors, so use the 'ti,irqs-reserved' property in derivative board
dts files _if_ any of them should not be handled by the host OS.
3. There are few more sub-modules like the Industrial Ethernet Peripherals
(IEPs), MDIO, PWM, UART that do not have bindings and so will be added
in the future.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210304160712.8452-2-s-anna@ti.com
On am642-evm the CPSW3g ext. Port1 is directly connected to TI DP83867 PHY
and Port2 is connected to TI DP83869 PHY which is shared with ICSS
subsystem. The TI DP83869 PHY MII interface is configured using pinmux for
CPSW3g, while MDIO bus is connected through GPIO controllable 2:1 TMUX154E
switch (MDIO GPIO MUX) which has to be configured to route MDIO bus from
CPSW3g to TI DP83869 PHY.
Hence add networking support for am642-evm:
- add CPSW3g MDIO and RGMII pinmux entries for both ext. ports;
- add CPSW3g nodes;
- add mdio-mux-multiplexer DT nodes to represent above topology.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210304211038.12511-4-grygorii.strashko@ti.com
Add CPSW3g DT node with two external ports, MDIO and CPTS support. For
CPSW3g DMA channels the ASEL is set to 15 (AM642x per DMA channel coherency
feature), so that CPSW DMA channel participates in Coherency and thus avoid
need to cache maintenance for SKBs. This improves bidirectional TCP
performance by up to 100Mbps (on 1G link).
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210304211038.12511-2-grygorii.strashko@ti.com
AM642 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM642 SoC. It supports the following interfaces:
* 2 GB LPDDR4 RAM
* x2 Gigabit Ethernet interfaces capable of working in switch and MAC mode
* x1 USB 3.0 Type-A port
* x1 UHS-1 capable µSD card slot
* 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837
* 512 Mbit OSPI flash
* x2 UART through UART-USB bridge
* XDS110 for onboard JTAG debug using USB
* Temperature sensors, user push buttons and LEDs
* 40-pin Raspberry Pi compatible GPIO header
* 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO)
* 54-pin header for Programmable Realtime Unit (PRU) IO pins
* Interface for remote automation. Includes:
* power measurement and reset control
* boot mode change
Add basic support for AM642 SK.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Link: https://lore.kernel.org/r/20210226184251.26451-3-lokeshvutla@ti.com
The AM642 EValuation Module (EVM) is a board that provides access to
various peripherals available on the AM642 SoC, such as PCIe, USB 2.0,
CPSW Ethernet, ADC, and more.
Introduce support for the AM642 EVM to enable mmc boot, including
enabling UART and I2C on the board.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-6-d-gerlach@ti.com
Add the nodes for DMSS INTA, BCDMA and PKTDMA to enable the use of the
DMAs in the system.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-5-d-gerlach@ti.com
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
peripherals.
* Centralized System Controller for Security, Power, and Resource
Management (DMSC).
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Introduce basic support for the AM642 SoC to enable ramdisk or MMC
boot. Introduce the sdhci, i2c, spi, and uart MAIN domain periperhals
under cbass_main and the i2c, spi, and uart MCU domain periperhals
under cbass_mcu.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-4-d-gerlach@ti.com
Quite an active release for driver specific updates but very little
going on at the subsystem level this time for the regulator API.
- Overhaul of the Qualcomm LABIBB driver.
- Allow use of regulator_sync_voltage() on coupled regulators.
- Support for Action ATC260x, Mediatek DVSRC and MT6315, Qualcomm
PCM8180/c and PM8009-1 and Richtek RT4831
- Removal of the AB3100 driver.
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Merge tag 'regulator-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"Quite an active release for driver specific updates but very little
going on at the subsystem level this time for the regulator API.
Summary:
- Overhaul of the Qualcomm LABIBB driver.
- Allow use of regulator_sync_voltage() on coupled regulators.
- Support for Action ATC260x, Mediatek DVSRC and MT6315, Qualcomm
PCM8180/c and PM8009-1 and Richtek RT4831
- Removal of the AB3100 driver"
* tag 'regulator-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (49 commits)
regulator: bd718x7, bd71828, Fix dvs voltage levels
regulator: pca9450: Add sd-vsel GPIO
regulator: pca9450: Enable system reset on WDOG_B assertion
regulator: pca9450: Add SD_VSEL GPIO for LDO5
regulator: qcom-rpmh: fix pm8009 ldo7
regulator: mt6315: Add support for MT6315 regulator
regulator: document binding for MT6315 regulator
regulator: dt-bindings: Document charger-supply for max8997
regulator: qcom-labibb: Use disable_irq_nosync from isr
regulator: pf8x00: Fix typo for PF8200 chip name
regulator: pf8x00: set ramp_delay for bucks
regulator: core: Avoid debugfs: Directory ... already present! error
regulator: pf8x00: Add suspend support
regulator: Make regulator_sync_voltage() usable by coupled regulators
regulator: s5m8767: Drop regulators OF node reference
regulator: qcom-rpmh: Add pmc8180 and pmc8180c
regulator: qcom-rpmh: Add pmc8180 and pmc8180c
regulator: s5m8767: Fix reference count leak
regulator: remove ab3100 driver
regulator: axp20x: Fix reference cout leak
...
Here is the big set of USB and Thunderbolt driver changes for 5.12-rc1.
It's been an active set of development in these subsystems for the past
few months:
- loads of typec features added for new hardware
- xhci features and bugfixes
- dwc3 features added for more hardware support
- dwc2 fixes and new hardware support
- cdns3 driver updates for more hardware support
- gadget driver cleanups and minor fixes
- usb-serial fixes, new driver, and more devices supported
- thunderbolt feature additions for new hardware
- lots of other tiny fixups and additions
The chrome driver changes are in here as well, as they depended on some
of the typec changes, and the maintainer acked them.
All of these have been in linux-next for a while with no reported
issues.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'usb-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB and Thunderbolt updates from Greg KH:
"Here is the big set of USB and Thunderbolt driver changes for
5.12-rc1.
It's been an active set of development in these subsystems for the
past few months:
- loads of typec features added for new hardware
- xhci features and bugfixes
- dwc3 features added for more hardware support
- dwc2 fixes and new hardware support
- cdns3 driver updates for more hardware support
- gadget driver cleanups and minor fixes
- usb-serial fixes, new driver, and more devices supported
- thunderbolt feature additions for new hardware
- lots of other tiny fixups and additions
The chrome driver changes are in here as well, as they depended on
some of the typec changes, and the maintainer acked them.
All of these have been in linux-next for a while with no reported
issues"
* tag 'usb-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (300 commits)
dt-bindings: usb: mediatek: musb: add mt8516 compatbile
dt-bindings: usb: mtk-xhci: add compatible for mt2701 and mt7623
dt-bindings: usb: mtk-xhci: add optional assigned clock properties
Documentation: connector: Update the description of sink-vdos
usb: misc: usb3503: Fix logic in usb3503_init()
dt-bindings: usb: usb-device: fix typo in required properties
usb: Replace lkml.org links with lore
dt-bindings: usb: dwc3: add description for rk3328
dt-bindings: usb: convert rockchip,dwc3.txt to yaml
usb: quirks: add quirk to start video capture on ELMO L-12F document camera reliable
USB: quirks: sort quirk entries
USB: serial: drop bogus to_usb_serial_port() checks
USB: serial: make remove callback return void
USB: serial: drop if with an always false condition
usb: gadget: Assign boolean values to a bool variable
usb: typec: tcpm: Get Sink VDO from fwnode
dt-bindings: connector: Add SVDM VDO properties
usb: typec: displayport: Fill the negotiated SVDM Version in the header
usb: typec: ucsi: Determine common SVDM Version
usb: typec: tcpm: Determine common SVDM Version
...
There are a lot of platforms that have not seen any interesting code
changes in the past five years or more.
I made a list and asked around which ones are no longer in use [1], and
received confirmation about six ARM platforms and the TI C6x architecture
that have all reached the end of their life upstream, with no known
users remaining:
- efm32 -- added in 2011, first Cortex-M, no notable changes after 2013
- picoxcell -- added in 2011, abandoned after 2012 acquisition
- prima2 -- added in 20111, no notable changes since 2015
- tango -- added in 2015, sporadic changes until 2017, but abandoned
- u300 -- added in 2009, no notable changes since 2013
- zx --added in 2015 for both 32, 2017 for 64 bit, no notable changes
- arch/c6x -- added in 2011, but work stalled soon after that
A number of other platforms on the original list turned out to still
have users. In some cases there are out-of-tree patches and users
that plan to contribute them in the future, in other cases the code
is complete and works reliably.
[1] https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC platform removals from Arnd Bergmann:
"There are a lot of platforms that have not seen any interesting code
changes in the past five years or more.
I made a list and asked around which ones are no longer in use, and
received confirmation about six ARM platforms and the TI C6x
architecture that have all reached the end of their life upstream,
with no known users remaining:
- efm32 - added in 2011, first Cortex-M, no notable changes after 2013
- picoxcell - added in 2011, abandoned after 2012 acquisition
- prima2 - added in 20111, no notable changes since 2015
- tango - added in 2015, sporadic changes until 2017, but abandoned
- u300 - added in 2009, no notable changes since 2013
- zx - added in 2015 for both 32, 2017 for 64 bit, no notable changes
- arch/c6x - added in 2011, but work stalled soon after that
A number of other platforms on the original list turned out to still
have users. In some cases there are out-of-tree patches and users that
plan to contribute them in the future, in other cases the code is
complete and works reliably"
Link: https://lore.kernel.org/lkml/CAK8P3a2DZ8xQp7R=H=wewHnT2=a_=M53QsZOueMVEf7tOZLKNg@mail.gmail.com/
* tag 'arm-platform-removal-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: remove u300 platform
ARM: remove tango platform
ARM: remove zte zx platform
ARM: remove sirf prima2/atlas platforms
c6x: remove architecture
MAINTAINERS: Remove deleted platform efm32
ARM: drop efm32 platform
ARM: Remove PicoXcell platform support
ARM: dts: Remove PicoXcell platforms
There are only two remaining non-urgent ARM SoC bug fixes that
could still apply for v5.11, or for the v5.12 merge window:
- A build fix for the Atmel SAM9 platform to allow building
with the clang integrated assembler
- A DT fix for ethernet on Intel SoCFPGA, this has been broken
since it was added in v5.4.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-fixes-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"There are only two left-over remaining non-urgent ARM SoC bug fixes:
- A build fix for the Atmel SAM9 platform to allow building with the
clang integrated assembler
- A DT fix for ethernet on Intel SoCFPGA, this has been broken since
it was added in v5.4"
* tag 'arm-fixes-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
ARM: at91: use proper asm syntax in pm_suspend
arm64: dts: agilex: fix phy interface bit shift for gmac1 and gmac2
Add the ethernet controller node in Toshiba Visconti5 SoC-specific DT file.
And enable this node in TMPV7708 RM main board's board-specific DT file.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: David S. Miller <davem@davemloft.net>
CM3 SRAM address space will be used for Flow Control configuration.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
More fixed indices for mmc nodes; removal of obsolete amba bus nodes;
nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix;
board-level fixes for Helios64, NanoPi and Rock960; more sound support
for rock64 and rockpro64 and cleanups to make dt-bindings happier.
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Merge tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt
New boards: Radxa Rock Pi E, NanoPi M4B
More fixed indices for mmc nodes; removal of obsolete amba bus nodes;
nand-flash-controller nodes for px30 and rk3308; rk3399 pcie ranges fix;
board-level fixes for Helios64, NanoPi and Rock960; more sound support
for rock64 and rockpro64 and cleanups to make dt-bindings happier.
* tag 'v5.12-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (24 commits)
arm64: dts: rockchip: more user friendly name of sound nodes
arm64: dts: rockchip: rename pinctrl nodename to gmac2io for nanopi-r2s board
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3368 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on rk3308 boards
arm64: dts: rockchip: assign a fixed index to mmc devices on px30 boards
arm64: dts: rockchip: cleanup cpu_thermal node of rk3399-rock960.dts
arm64: dts: rockchip: Remove bogus "amba" bus nodes
arm64: dts: rockchip: Light "sys" LED on NanoPi R2S
arm64: dts: rockchip: fix ranges property format for rk3399 pcie node
arm64: dts: rockchip: Rely on SoC external pull up on pmic-int-l on Helios64
arm64: dts: rockchip: Add NanoPi M4B board
arm64: dts: rockchip: Move ep-gpios property to nanopc-t4 from nanopi4
arm64: dts: rockchip: Add NFC node for PX30 SoC
arm64: dts: rockchip: Add NFC node for RK3308 SoC
arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E
dt-bindings: arm: rockchip: Add Radxa ROCK Pi E
arm64: dts: rockchip: rk3328: Add clock_in_out property to gmac2phy node
arm64: dts: rockchip: rename thermal subnodes for rk3399
arm64: dts: rockchip: rename thermal subnodes for rk3368
arm64: dts: rockchip: add SPDIF node for rk3399-rockpro64
...
Link: https://lore.kernel.org/r/12699743.uLZWGnKmhe@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: Beacon i.MX8M Nano development kit, i.MX8MM Nitrogen,
Gateworks i.MX 8M Mini Development Kits, phyBOARD-Pollux-i.MX8MP,
Librem5 Evergreen.
- Update imx8mm-beacon to drop unused clock-names reference, and add
more pinctrl states for USDHC1.
- Support soc unique ID read with NVMEM on i.MX8M SoCs.
- A series from Biwen Li to add interrupt line for RTC device on
Layerscape SoCs.
- A couple of patch sets to update imx8mq-librem5 support around
regulators, RTC, charger, display, etc.
- A series from Joakim Zhang to improve i.MX8M FEC device configuration.
- A series from Kuldeep Singh to enable flexcan support for LX2160A and
LS1028A.
- A series from Lucas Stach to update ZII devices around audio, USB, I2C
pin configuration and UCS1002 ALERT.
- A series from Michael Walle to update Layerscape device trees to use
constants in the clockgen phandle, add sl28 variant 1 and enable SATA.
- A few patches from Russell King to improve support for a couple of
LX2160A boards.
- A series from Shengjiu Wang to add more audio support for imx8mn-evk.
- Other small and random updates.
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Merge tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree update for 5.12:
- New board support: Beacon i.MX8M Nano development kit, i.MX8MM Nitrogen,
Gateworks i.MX 8M Mini Development Kits, phyBOARD-Pollux-i.MX8MP,
Librem5 Evergreen.
- Update imx8mm-beacon to drop unused clock-names reference, and add
more pinctrl states for USDHC1.
- Support soc unique ID read with NVMEM on i.MX8M SoCs.
- A series from Biwen Li to add interrupt line for RTC device on
Layerscape SoCs.
- A couple of patch sets to update imx8mq-librem5 support around
regulators, RTC, charger, display, etc.
- A series from Joakim Zhang to improve i.MX8M FEC device configuration.
- A series from Kuldeep Singh to enable flexcan support for LX2160A and
LS1028A.
- A series from Lucas Stach to update ZII devices around audio, USB, I2C
pin configuration and UCS1002 ALERT.
- A series from Michael Walle to update Layerscape device trees to use
constants in the clockgen phandle, add sl28 variant 1 and enable SATA.
- A few patches from Russell King to improve support for a couple of
LX2160A boards.
- A series from Shengjiu Wang to add more audio support for imx8mn-evk.
- Other small and random updates.
* tag 'imx-dt64-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (71 commits)
arm64: dts: imx: Add i.mx8mm nitrogen basic dts support
arm64: dts: zii-rmb3: enable RMI4 reduced reporting
arm64: dts: zii-ultra: only trigger IRQ on falling edge ucs1002 ALERT pin
arm64: dts: zii-ultra: limit USB ports to USB2 speed
arm64: dts: zii-ultra: fix i2c pin configuration
arm64: dts: zii-ultra: add sound support
arm64: dts: ls1028a: Enable flexcan support for LS1028A-RDB/QDS
arm64: dts: ls1028a: Update flexcan properties
arm64: dts: lx2160a: Add flexcan support
arm64: dts: fsl-ls1012a-frdm: add spi-uart device
arm64: dts: fsl-ls1012a-rdb: add i2c devices
arm64: dts: imx8mn-beacon-som: Enable QSPI on SOM
arm64: dts: imx8mn: Add fspi node
arm64: dts: Add Librem5 Evergreen
arm64: dts: imx8mq-librem5: set regulators boot-on
arm64: dts: imx8mq-librem5: enable the LCD panel
arm64: dts: imx8mq-librem5: Add LCD_1V8 regulator
arm64: dts: imx8mq-librem5: Add usb-c chip as supplier for the charger
arm64: dts: imx8mq-librem5: Don't mark buck3 as always on
arm64: dts: imx8mq-librem5: Mark charger IRQ as High-Z
...
Link: https://lore.kernel.org/r/20210204120150.26186-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A series from Oleksij Rempel to add i.MX6 based Plymovent, Protonic
and Kverneland boards.
- A series from Andreas Kemnade to improve UART support for ebook
readers.
- A series from Fabio Estevam to update imx6ul-14x14-evk device tree for
adding GPIO expander and camera support.
- A patch set from Lucas Stach to improve ZII RDU2 support, enabling
WDOG, tuning I2C drive-strength, RMI4 and UCS1002 ALERT.
- Other small and random updates on various boards.
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Merge tag 'imx-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX device tree change for 5.12:
- A series from Oleksij Rempel to add i.MX6 based Plymovent, Protonic
and Kverneland boards.
- A series from Andreas Kemnade to improve UART support for ebook
readers.
- A series from Fabio Estevam to update imx6ul-14x14-evk device tree for
adding GPIO expander and camera support.
- A patch set from Lucas Stach to improve ZII RDU2 support, enabling
WDOG, tuning I2C drive-strength, RMI4 and UCS1002 ALERT.
- Other small and random updates on various boards.
* tag 'imx-dt-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (37 commits)
ARM: dts: imx6: RDU2: adjust audio devices nomenclature
ARM: dts: imx6: RDU2: only trigger IRQ on falling edge ucs1002 ALERT pin
ARM: dts: imx6: RDU2: enable RMI4 reduced reporting
ARM: dts: imx6: RDU2: reduce i2c drive-strength
ARM: dts: imx6: rdu2: enable WDOG1
ARM: dts: imx6-sr-som: increase at8035 PHY gigabit Tw parameter
ARM: dts: imx6: add wakeup support via magic packet
firmware: imx: select SOC_BUS to fix firmware build
arm64: dts: imx8mp: Correct the gpio ranges of gpio3
ARM: dts: imx6qdl-sr-som: fix some cubox-i platforms
ARM: dts: imx: e60k02: add second uart
ARM: dts: imx6sl-tolino-shine3: correct console uart pinmux
ARM: dts: imx6sl-tolino-shine2hd: add second uart
ARM: dts: imx6sl-tolino-shine2hd: correct console uart pinmux
ARM: imx: build suspend-imx6.S with arm instruction set
ARM: dts: imx7d-flex-concentrator: fix pcf2127 reset
ARM: dts: add Kverneland TGO board
ARM: dts: add Kverneland UT1, UT1Q and UT1P
ARM: dts: imx6ul-14x14-evk: Add camera support
ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset
...
Link: https://lore.kernel.org/r/20210204120150.26186-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This introduces initial support for the new SM8350 platform, aka
Snapdragon 888, and the MTP device for this.
It adds PCIe, audio, display, GPU, HDMI watchdog, LLCC and PMIC ADC
support to the SM8250 platform and RB5 in particular, as well as improve
the definition of CPUs, thermal zones and fixes a few smaller issues.
It introduces new Devicetree files for the Alcatel Idol 3, ASUS Zenfone
2 Laser and BQ Aquaris X5, based on the MSM8916 platform.
It contains an overhaul of the existing MSM8992 and MSM8994 platform
files and introduces RPM power domains and SMP2P nodes. It adds
touchscreen, additional regulators, microSD card support and adds the
Sony Mobile Ivy, Karin, Suzuran and Satsuki devices. It joins the common
parts of the Lumia 950 and 950XL and extend these with support for
sensors, NFC, bluetooth, audio, microSD and Type-C mux pins.
It introduces support for the OnePlus6 and 6t, adds the missing higher
frequences for the SDM850 laptops, adds CPU cluster idle support on
SM8150 and a few tweaks to the SC7180 platform.
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Merge tag 'qcom-arm64-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DT updates for 5.12
This introduces initial support for the new SM8350 platform, aka
Snapdragon 888, and the MTP device for this.
It adds PCIe, audio, display, GPU, HDMI watchdog, LLCC and PMIC ADC
support to the SM8250 platform and RB5 in particular, as well as improve
the definition of CPUs, thermal zones and fixes a few smaller issues.
It introduces new Devicetree files for the Alcatel Idol 3, ASUS Zenfone
2 Laser and BQ Aquaris X5, based on the MSM8916 platform.
It contains an overhaul of the existing MSM8992 and MSM8994 platform
files and introduces RPM power domains and SMP2P nodes. It adds
touchscreen, additional regulators, microSD card support and adds the
Sony Mobile Ivy, Karin, Suzuran and Satsuki devices. It joins the common
parts of the Lumia 950 and 950XL and extend these with support for
sensors, NFC, bluetooth, audio, microSD and Type-C mux pins.
It introduces support for the OnePlus6 and 6t, adds the missing higher
frequences for the SDM850 laptops, adds CPU cluster idle support on
SM8150 and a few tweaks to the SC7180 platform.
* tag 'qcom-arm64-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (100 commits)
arm64: dts: qcom: msm8998: Use rpmpd definitions for opp table levels
arm64: dts: qcom: msm8996: Add missing device_type under pcie[01]
arm64: dts: qcom: sc7180: Add support for gpu fuse
arm64: dts: qcom: msm8998: Disable some components by default
arm64: dts: qcom: msm8998: Add capacity-dmips-mhz to CPU cores
arm64: dts: qcom: msm8998: Add I2C pinctrl and fix BLSP2_I2C naming
arm64: dts: qcom: msm8998: Add DMA to I2C hosts
arm64: dts: qcom: msm8998: Merge in msm8998-pins.dtsi to msm8998.dtsi
arm64: dts: msm8916: Fix reserved and rfsa nodes unit address
arm64: dts: qcom: msm8994-octagon: Add AD7147 and APDS9930 sensors
arm64: dts: qcom: msm8994-octagon: Add TAS2553 codec
arm64: dts: qcom: msm8994-octagon: Add sensors on blsp1_i2c5
arm64: dts: qcom: msm8994-octagon: Add NXP NFC node
arm64: dts: qcom: msm8994-octagon: Add FM Radio and DDR regulator nodes
arm64: dts: qcom: msm8994-octagon: Configure PON keys
arm64: dts: qcom: msm8994-octagon: Configure Lattice iCE40 FPGA
arm64: dts: qcom: msm8994-octagon: Add uSD card and disable HS400 on eMMC
arm64: dts: qcom: msm8994-octagon: Configure HD3SS460 Type-C mux pins
arm64: dts: qcom: msm8994-octagon: Add QCA6174 bluetooth
arm64: dts: qcom: msm8994-octagon: Configure regulators
...
Link: https://lore.kernel.org/r/20210204052043.388621-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
ODROID-HC4 is a derivative of the C4 with minor differences:
- 16MB XT25F128B SPI-NOR flash
- 2x SATA ports via ASM1061 PCIe to SATA controller
- 7-pin header with SPI and I2C for 1-inch OLED display and RTC
- 1x USB 2.0 host port
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210202021021.11068-6-christianshewitt@gmail.com
Convert the ODROID-C4 dts to meson-sm1-odroid.dtsi and C4 board dts in
preparation for adding additional C4 family boards.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210202021021.11068-4-christianshewitt@gmail.com
The shift for the phy_intf_sel bit in the system manager for gmac1 and
gmac2 should be 0.
Fixes: 2f804ba7aa9ee ("arm64: dts: agilex: Add SysMgr to Ethernet nodes")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Enable the onboard pcf8563 rtc hardware on ODROID N2/N2+ boards via the
common dtsi. Also add aliases to ensure vrtc does not claim /dev/rtc0.
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20210111135831.2218-1-christianshewitt@gmail.com
The node names for devices using the pwm-leds driver follow a certain
naming scheme (now). Parent node name is not enforced, but recommended
by DT project.
Signed-off-by: Alexander Dahl <post@lespocky.de>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201228163217.32520-5-post@lespocky.de
The dt-bindings/power/qcom-rpmpd.h header is being included in this
DT but the RPMPD OPP table declarations were using open-coded values:
use the definitions found in the aforementioned header.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210109160759.186990-1-angelogioacchino.delregno@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
