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* Fix for kmemleak with pKVM
s390:
* Fixes for VFIO with zPCI
* smatch fix
x86:
* Ensure XSAVE-capable hosts always allow FP and SSE state to be saved
and restored via KVM_{GET,SET}_XSAVE
* Fix broken max_mmu_rmap_size stat
* Fix compile error with old glibc that doesn't have gettid()
-----BEGIN PGP SIGNATURE-----
iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmMtvg4UHHBib256aW5p
QHJlZGhhdC5jb20ACgkQv/vSX3jHroNy2Af/VybWK2uAbaMkV6irQ1YTJIrRPco1
C+JQdiQklYbjzThfPWNF/MiH+VTObloR1KqztOeQbfcrgwzygO68D3bs0wkAukLA
mtdcMjdsqNx8r9u533i6S8Dpo0RkHKl+I8+3mHdPHTzlrbCuYJFFFxFNLhE+xbrK
DP2Gl/xXIGYwOv2nfHA/xxI7TRICv4IxmzQazxlmC27n6BLNSr8qp6jI9lXJQfJ8
XJh3SbmRux3/cs2oEqONg8DySJh631kI1jGGOmL3qk07ZR7A5KZ+lju0xM7vQIEq
aR25YNYZux+BPIY/WxT1R0j6pwinBmFp8OoQYCs8DaQ65fdE5gegtJRpow==
=VADm
-----END PGP SIGNATURE-----
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
"As everyone back came back from conferences, here are the pending
patches for Linux 6.0.
ARM:
- Fix for kmemleak with pKVM
s390:
- Fixes for VFIO with zPCI
- smatch fix
x86:
- Ensure XSAVE-capable hosts always allow FP and SSE state to be
saved and restored via KVM_{GET,SET}_XSAVE
- Fix broken max_mmu_rmap_size stat
- Fix compile error with old glibc that doesn't have gettid()"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: x86: Inject #UD on emulated XSETBV if XSAVES isn't enabled
KVM: x86: Always enable legacy FP/SSE in allowed user XFEATURES
KVM: x86: Reinstate kvm_vcpu_arch.guest_supported_xcr0
KVM: x86/mmu: add missing update to max_mmu_rmap_size
selftests: kvm: Fix a compile error in selftests/kvm/rseq_test.c
KVM: s390: pci: register pci hooks without interpretation
KVM: s390: pci: fix GAIT physical vs virtual pointers usage
KVM: s390: Pass initialized arg even if unused
KVM: s390: pci: fix plain integer as NULL pointer warnings
KVM: arm64: Use kmemleak_free_part_phys() to unregister hyp_mem_base
This corrects invalid IOMMU streams for the SM8150 CDSP FastRPC, moves
the wakeup-source of SC7280 USB nodes to the correct place, fixes the
SM8350 UFS PHY serdes size to not overlap with the other subnodes and
updates the firmware location for the Lenovo ThinkPad X13s to match the
movement in linux-firmware.
It also updates MAINTAINERS and .mailmap to reflect the changes in my
email address.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrHooVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FXQcP/i9Np/QVhTEcyeGyXcM9Et+gUCK+
ne/4bz+hXJLqrFbd4eZSeHb+tAg0S6yFnEXGrYPHhoe5iRHZGXoIxCbgTwCWO/SN
sVwfVa5/ekvCQK+yUaKa1POka2TjKKWfTXj/HZiCYRcezWyxkxFZh00cjD3NiC1u
WaHCB0YbMnvEC1RabJoh+ZK+N2KXPVQpP9n/MZEMXtyPrCLe59feQyg7xcviJ/cY
Xwc77YB9lKsLiWzbDOvhwdSrEpb7vFvPXFKj4Pg7xEZ1nINUPmdtjf1v/Z/1luAj
gyxL92xZytSw5oireRf6Vwio80SPopafTeMvsjjvcO0mnmA1LhAD5srnUi8z8yXE
XVk9CQ/v4HjXYGJJxuTNUo7J30ar3O8Whbd5i0jRuwUCqu1OsgamXJYtK2WUSVyr
65idMgDfv01F7WMC59ZoLxvoZpncAO5nu+JozdZ4ryR9Iidl3L/D4ge+gjLLBFvR
8CN1Y/ZV5qqa+VUbovLod4zrr6tGO27OJ7QNIxblMqEBOFF9OEW+fRezH4R37VsM
Y9B7LWbPVVV/QNmGjXud4hl/ihz8AcgplXMOR5oMmpy8mp3gHFyi8umMcWpw/u6g
6DeQ356dSP2wFAgE+xlhEYABxIYdN+3wSrxNElgHldP5QxoYufrqT/Tcg6Nd7iHq
R4VNA9vp/irXtksF
=0C1/
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtxlUACgkQmmx57+YA
GNkb4A/+M9UqBcaskORpCLzW9CF3NFvD9eUqK1c04vlZySnJAnhSv7FiemRM13Ru
31k1MVORRH0i5KjReM9yB95nyasDhodmumZgZPoYL+iF236NzekeJ3xn+RvG2mpp
EOVIIL0LlWVS1FQMr8kGaPJxydUxtocPfeaisEu1TIKS01cA4xQ9DlJrYUU/POkV
BiRVaZlN2kdQPmEJW8ZaAruNsOo7KmGI0yuQ4IzBMFh20Zu/fOnyORNtrbKCfQqK
9axTb9M/xtnkuoFxtLrVRF7rAumSr5tjvOqWw7gmSM/2kvK6/RuN5/BLkWh8dMyS
yvQ3xztyI8IJX6YOZ7qcbcLPobxUHcuqUH/cUMRXqtSSW0jMuVItQ4DHm5qleFZ6
+1XFsHsI8Y7c2jaxY3V5BV2jd98zwxD0FCSvLNi1Sc+eW1FJXdCiv+fqf8q8302O
jjto6UW7/aiWOFiTErE+Hddcyq0D14BNVlwBMRmPK2Mk4h5NUmMPmur69uYniTcb
3+Grt8lY13uO5smhFBUrQ/HjC6bGEeKjOpxTQ/LT0/aWlwBsZcP+/ihOK3EinNLJ
ROSW63iv2iOhNYZ9A7W4D1CGOH62RAxxfaee568LwG8aCLt47FrQ/g5U+z5zkUHc
M8loNtUpTKIfw4GxJgGHomVXppFx1JbhTrDY35MsmWEeJjIl5rQ=
=WotM
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-fixes-for-6.0' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm ARM64 DTS fixes for 6.0
This corrects invalid IOMMU streams for the SM8150 CDSP FastRPC, moves
the wakeup-source of SC7280 USB nodes to the correct place, fixes the
SM8350 UFS PHY serdes size to not overlap with the other subnodes and
updates the firmware location for the Lenovo ThinkPad X13s to match the
movement in linux-firmware.
It also updates MAINTAINERS and .mailmap to reflect the changes in my
email address.
* tag 'qcom-arm64-fixes-for-6.0' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: dts: qcom: sm8350: fix UFS PHY serdes size
arm64: dts: qcom: sc8280xp-x13s: Update firmware location
MAINTAINERS: Update Bjorn's email address
arm64: dts: qcom: sc7280: move USB wakeup-source property
arm64: dts: qcom: thinkpad-x13s: Fix firmware location
arm64: dts: qcom: sm8150: Fix fastrpc iommu values
Link: https://lore.kernel.org/r/20220921142939.1310163-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
Edition gains magnetometer support.
MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.
On SA8295P ADP problems arising from regulators being switched into
low-power mode is worked around by removing this ability, for now.
The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
related updates are introduced.
On SC7280 support for the CPU and LLC bwmon instances are introduced.
Soundwire, audio codecs and sound introduced for a variety of boards.
Using required-opps the USB controllers votes for a minimum corner on
VDD_CX.
The onboard USB Hub Herobrine is described. A new board, the Google
Evoker is added, as is another revision of Herobrine Villager.
On SC8280XP the USB controllers are marked as wakeup-sources, to keep
them powered during suspend. The CRD has HID devices marked as
wakeup-sources to enable resuming the system. In addition to these
changes the alternative touchpad is introduced on the Lenovo ThinkPad
X13s.
SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
interconnect providers and GPI DMA is introduced. A description of the
PM7280b PMIC is added to Fairphone FP4 on SM7225.
With the multi-MSI support added in the PCIe controller, SM8250 gets all
its MSI interrupts added.
UFS ICE and the second SDHCI controller is introduced on SM8450. Support
for the Sony Xperia 1 IV is introduced.
Throughout a variety of platforms the TCSR mutex syscon is replaced with
the MMIO-based binding. TCSR nodes gained proper compatibles and halt
syscon nodes are split out from the mutex ranges.
A range of fixes to align with DT bindings are introduced. Among these
are the changes to the follow the TLMM binding and suffix pinctrl states
with -state and subnodes thereof with -pins, another is a number of
changes transitioning to use -gpios and introduction of proper parent
clock references in various clock providers.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmMrosIVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FCkkP/iuTNOUwcpz03IijhJJILfUF1aSS
o7UAadfYj4dKqvc9BGdq+A9OSDqaMmceXwbPWYZQONpHrSNVMIUxUevtrUAxOxYj
fEf4VLRk2AJ2GqtRasqQL7WOESPS1bD7rRyNg5nFD3urTTqXjkgC9XoYQk9uufPx
hLdFeEB672pi0HWiQIgk5iL36O6OEEeK6rl0/PF1y8N8GkYVln1XD7SKNs2tsDcM
0unclymdckPbhxq1tuuRWXhCUZlOWRUP8+89L14M+HT3RrtudnJ8v2jtgygtziPS
TZ+wJa2CMcIZCgQ7kBcORSiMquIHV4bGcq5UNAX0juU2CFIFIQu+VzStT80+6SsU
ATkJSl4GKw/HuJS4W0JLk73mLIhtEhqIfR7qFfiDjhGphbgRkTEdMtqG5WIKzf7D
3ourD0qs3IC+XmtkjnTykJZam9BYNFt99QBHdsjZq37rMvll7BKtEPdrKIKmzzzY
hqOv27Bt4cp2xgZ6Hoot/oSfCOSQffcHPuDzkrfsinM0ZEeDLpMW7ynIQDvw08Fs
2OMbhbP3c/onhoaEuLp9eLt+ghV58PkNvKPcWBma5oNCDvi84CRDU8HOGLbnmeDv
4haXe/Ib3OoT4+raCLYrY5fI3lf2CG9cLQVHs02apilKUQ7HiMLeH3L6vNpH9v0g
BXpu2rG+gbAgJzgH
=XT9N
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtxHsACgkQmmx57+YA
GNnDbw/7BIQIOXFkx6xb5dJbfxAs9EGlPngcgUGWHMUZ166Q+e+nGCUMiDtekLrC
E07g05dPO2oaS2XtcHYVQmaR+Sq9SQYb1nFE6P1kvHmz0SxueR8fDpUheFn4IunP
OCcyPoKGar72HcFh/v2r9SdJgVAEQ6bYvNzwJN2qqMQRW5fMHUBlJtcMumGNyg/0
MNzoSvmx/s2sL6yf6xVt7kqerl/7szFF13PnbWlUEnDhbZUHoOh5VYt2Xxpp9rjX
M09iM/mOkyms7ngcU9m+izYAg+aVeDBSynoyhqQUlrDwbFu83TQ+jFSp0MkJrSiQ
RHJSBNnXx9wmJuox/A2ZBUmMcjqaizz4ciXXVu5t7xP8wFKQZRfblCX1+B2G0qSu
1rqxBqGrVEzRanoZjpMCSrObSjD/t1wIpTN5hqvpEoR3nXWRFzLOIQjXyIkKVZ4p
ePc8Et1yYlQqv7S3GS12jLy8s/sKxOk0sTAzWuTavT+QrgJVDZScaSU9t9hhk4tC
HRlwHBag0nallJcz+gnmbG56f0zcVsvOHnMV+OBFA4wHInlVS+A+Rt0TouqjEiAo
IlVCXlO24jgsZi/x6ZwVboIBYzPLsaOmsr5Tg9Dua494/U+Im23qCFBvRGHiEoBe
tAyCAsYSLNsOhgjxC/tFVOQJOmlw+moerBpZNcu2XMG/aXLHwMA=
=ZHbe
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 DTS updates for 6.1
Support for Samsung Galaxy E5, E7 and Grand Max is added, with support
for both 32-bit and 64-bit variants. The Samsung Galaxy S4 Mini Value
Edition gains magnetometer support.
MSM8996-based Xiaomi devices gains descriptions of the LPG-based LEDs.
On SA8295P ADP problems arising from regulators being switched into
low-power mode is worked around by removing this ability, for now.
The onboard USB Hub on SC7180 Trogdor is finally described and a few ADC
related updates are introduced.
On SC7280 support for the CPU and LLC bwmon instances are introduced.
Soundwire, audio codecs and sound introduced for a variety of boards.
Using required-opps the USB controllers votes for a minimum corner on
VDD_CX.
The onboard USB Hub Herobrine is described. A new board, the Google
Evoker is added, as is another revision of Herobrine Villager.
On SC8280XP the USB controllers are marked as wakeup-sources, to keep
them powered during suspend. The CRD has HID devices marked as
wakeup-sources to enable resuming the system. In addition to these
changes the alternative touchpad is introduced on the Lenovo ThinkPad
X13s.
SDM845 gains RPMh stats support and the LLCC BWMON is added. For SM6350
interconnect providers and GPI DMA is introduced. A description of the
PM7280b PMIC is added to Fairphone FP4 on SM7225.
With the multi-MSI support added in the PCIe controller, SM8250 gets all
its MSI interrupts added.
UFS ICE and the second SDHCI controller is introduced on SM8450. Support
for the Sony Xperia 1 IV is introduced.
Throughout a variety of platforms the TCSR mutex syscon is replaced with
the MMIO-based binding. TCSR nodes gained proper compatibles and halt
syscon nodes are split out from the mutex ranges.
A range of fixes to align with DT bindings are introduced. Among these
are the changes to the follow the TLMM binding and suffix pinctrl states
with -state and subnodes thereof with -pins, another is a number of
changes transitioning to use -gpios and introduction of proper parent
clock references in various clock providers.
* tag 'qcom-arm64-for-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (136 commits)
arm64: dts: qcom: sc7280: Add required-opps for USB
arm64: dts: qcom: sm8450: fix UFS PHY serdes size
arm64: dts: qcom: ipq8074: fix PCIe PHY serdes size
arm64: dts: qcom: sa8295p-adp: add missing gpio-ranges in PMIC GPIOs
arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs
arm64: dts: qcom: msm8996-xiaomi: align PMIC GPIO pin configuration with DT schema
arm64: dts: qcom: msm8994-msft-lumia-octagon: align resin node name with bindings
arm64: dts: qcom: pmi8994: add missing MPP compatible fallback
dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
arm64: dts: qcom: sc7280: Add missing aggre0, aggre1 clocks
arm64: dts: qcom: sc7280-villager: Adjust LTE SKUs
dt-bindings: arm: qcom: Adjust LTE SKUs for sc7280-villager
arm64: dts: qcom: sc7280-herobrine: Add nodes for onboard USB hub
arm64: dts: qcom: sc7180-trogdor: Add nodes for onboard USB hub
arm64: dts: qcom: align SDHCI reg-names with DT schema
arm64: dts: qcom: sm8250: provide additional MSI interrupts
arm64: dts: qcom: msm8996: add #clock-cells and XO clock to the HDMI PHY node
arm64: dts: qcom: Use WCD9335 DT bindings
arm64: dts: qcom: msm8994: switch TCSR mutex to MMIO
arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
...
Link: https://lore.kernel.org/r/20220921234854.1343238-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: i.MX8DXL EVK, Kontron SL/BL i.MX8MM OSM-S, i.MX8MM
Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board, NXP
LS2081ARDB.
- Update i.MX8MQ device tree to use generic name 'dma-controller' for
SDMA.
- A number of i.MX8ULP device tree improvements and updates: correct
parent clock of LPI2C & LPSPI, increase the clock speed of LPSPI, add
PMU and mailbox device, drop undocumented CGC property, enable FEC, etc.
- Add interconnect property for various i.MX8MP blk-ctrl devices.
- Enable VPU PGC, blk-ctrl and PCIe support for i.MX8MP SoC.
- A set of changes from Peng Fan to add various devices for i.MX93 SoC,
including MU, blk-ctrl, PMU, LPI2C, LPSPI, SRC, etc.
- Two set of changes to update LS1043A and LS1046A device trees on
various aspects, including USB3, PCIe, DMA, mdio-mux, QSPI Flash, etc.
- Board imx8mq-librem5 update: add USB role switching, add RGB PWM
notification LEDs, add voice coil motor for focus control, fix MIPI_CSI
description.
- A series from Frieder Schrempf to improve imx8mm-kontron device trees
for VSELECT switch, DDRC operating point, SPI NOR partition layout etc.
- A set of display and PMIC related additions and improvements on
imx8mm-verdin board.
- A number of i.MX8M Plus DHCOM PDK2 device tree improvments from Marek
Vasut.
- A few imx8mp-venice device tree updates on USB, cpufreq and WiFi/BT.
- A series from Vladimir Oltean to enable multiple switch CPU ports
support.
- Other small and random board specific updates.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmMm4WcUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM616ggApJ4zHHQQovmdWWYa6XH471LQGxZ4
HNw1Pui4imStowaPvyiRFcjr8wrQMGQ59NAQV4vVqX3p+xoeb/3ICO1h2cx8kosE
9YkBU0AqbgcFuiXRb4lOHqzy8D/ZGH1N/A8xASgUkTVSQDMCNyPucA7Xc5+EULDo
RmnicFCeF85j/mXy/IBVkXJwV/aH9RqF1HUwjYRAR/GE7yLCWMSwRfDhECCkjfqw
ypkTeYEkaubnZzFY1QWguOG9/x+TZ+VdMzOsRosfzFOowsC1SrurK5rm+DdVBoAJ
p5z7GumhY5kfFLBbScvtvR/HGF3YNyekHmaGm6xExhzZuhcy3fVLhsGRhg==
=sWBW
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtvnIACgkQmmx57+YA
GNnQBQ//YAs4teQnZkTNYe0bpsUbUSqHZmbXHldBWHXM1o+753RnVlYYpcDpq3xX
D8jKnnZSGv/PApdjSiNsNZYvgA7loe9Xut6LgWtTGXL3MZHbtygK2a7r+GucPGy2
Ku8rZ2XfGROo11SUlIE4AAz0Yb/kUdxYL7COim5pBcinWBVAVBF71Ls6nKD0vida
bKhxc+ymrBofDtaZjiwLTBUA5I0a9NUdwFRI0GhY3tK1BmmlV453bTgY5DGBeRoC
G0ApQ/0tIAHuXVVh2a+NwlAS77iq9psYwGkzNhLDmkEmwfXvw7Of+qkCQNaAaga8
hTGfZKEZ2E45pGVI/P7rTh5POCIPcY3rwXIjqcRdaedm3RewLnQQuo8b7prsAJZW
OsnmilkxjjhUdHbxEp8OlYHSWbgWiaJMgnxPyT1YTp8dsIuXCF28UbvMlmgfc0H0
SiJsVYYRxm36TBr6L1weFKtatCextjgGDej236924VwzJCM5UAOSlFbaoO/wuVyl
vcjVCaapzWJrtTNGgneFltsUXGjdky4VQxLzfBzNc1lSkWHY7fK6sjnQYogRP3Vt
y+oztYJOSYMPOzS50NaliGl/daV3qZQXuIhAwtjXUwezuPvQJpb5XByaPeNJ6j1c
sTjo5NXvLZzcVD+32m9Rrhdj1+KT7ULeIKN2rAPm6JNCDxTzGjQ=
=S7Rl
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 6.1:
- New board support: i.MX8DXL EVK, Kontron SL/BL i.MX8MM OSM-S, i.MX8MM
Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board, NXP
LS2081ARDB.
- Update i.MX8MQ device tree to use generic name 'dma-controller' for
SDMA.
- A number of i.MX8ULP device tree improvements and updates: correct
parent clock of LPI2C & LPSPI, increase the clock speed of LPSPI, add
PMU and mailbox device, drop undocumented CGC property, enable FEC, etc.
- Add interconnect property for various i.MX8MP blk-ctrl devices.
- Enable VPU PGC, blk-ctrl and PCIe support for i.MX8MP SoC.
- A set of changes from Peng Fan to add various devices for i.MX93 SoC,
including MU, blk-ctrl, PMU, LPI2C, LPSPI, SRC, etc.
- Two set of changes to update LS1043A and LS1046A device trees on
various aspects, including USB3, PCIe, DMA, mdio-mux, QSPI Flash, etc.
- Board imx8mq-librem5 update: add USB role switching, add RGB PWM
notification LEDs, add voice coil motor for focus control, fix MIPI_CSI
description.
- A series from Frieder Schrempf to improve imx8mm-kontron device trees
for VSELECT switch, DDRC operating point, SPI NOR partition layout etc.
- A set of display and PMIC related additions and improvements on
imx8mm-verdin board.
- A number of i.MX8M Plus DHCOM PDK2 device tree improvments from Marek
Vasut.
- A few imx8mp-venice device tree updates on USB, cpufreq and WiFi/BT.
- A series from Vladimir Oltean to enable multiple switch CPU ports
support.
- Other small and random board specific updates.
* tag 'imx-dt64-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (90 commits)
arm64: dts: ls1046a-qds: Modify the qspi flash frequency
arm64: dts: ls1046a-qds: add mmio based mdio-mux nodes for FPGA
arm64: dts: ls1046a: add gpios based i2c recovery information
arm64: dts: ls1046a: use a pseudo-bus to constrain usb and sata dma size
arm64: dts: ls1046a: make dma-coherent global to the SoC
arm64: dts: ls1046a: add missing dma ranges property
arm64: dts: ls1046a: Add big-endian property for PCIe nodes
arm64: dts: ls1046a: Add the PME interrupt and big-endian to PCIe EP nodes
arm64: dts: ls1046a: Enable usb3-lpm-capable for usb3 node
arm64: dts: ls1043a-rdb: add pcf85263 rtc node
arm64: dts: ls1043a-qds: add mmio based mdio-mux support
arm64: dts: ls1043a: use a pseudo-bus to constrain usb and sata dma size
arm64: dts: ls1043a: add gpio based i2c recovery information
arm64: dts: ls1043a: make dma-coherent global to the SoC
arm64: dts: ls1043a: add missing dma ranges property
arm64: dts: ls1043a: Add big-endian property for PCIe nodes
arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes
arm64: dts: ls1043a: use pcie aer/pme interrupts
arm64: dts: ls1043a: Enable usb3-lpm-capable for usb3 node
arm64: dts: ls1043a: fix the wrong size of dcfg space
...
Link: https://lore.kernel.org/r/20220918092806.2152700-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix for a code analyser warning
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEwGNS88vfc9+v45Yq41TmuOI4ufgFAmMtmHcACgkQ41TmuOI4
ufhapA/+OGjJtUKEa/LkCArUMUgJ+ZYy9cwx3Qrkvm7BtEguN35uxO5T7X8pdMDU
/dYSDwtPT1ob/QmjhwwE0dpgUF8yfkBNLKBK37f6jTznI4mS6UEq/IB1BcCk3ss5
45xG8rWiXS7oFm9bxtNsa5jkrSf7gIOuEa570tOVtOlBYvtFIH2SiHvcCUY1w48N
A6docb+vOJnPIBHPR/1q+bBoghO5rplYaX0EiAt3EYThrhAjsXjIFzaQPwXUxgFh
Nk/3ni1St72sbWDiC7YxjDghMVuW1GuQAlgkDWvy8bdA0IfsaqbyISuyIWZWkRfx
V8+7OfGVsCB7qhT4C+65fQPqwZwERNwwvAFsx175/Mm9/AXn217+sN52O54olFcM
dhKI7med1R/LqO2HH9kCGIUfJ3t+0JHpFDwcJyiAZsFbYffnwUQbIW4YcA3O+rje
cV8/kRhD6ebzrScTOMVH+Rb4Q0N0kL34iHXbI8wcTBKmSFrdRm9YeLtQM2P/HtPA
GVyg49bfXfA13goM9jaUW/IgT1aSHNRHfbfFKTUB7ph2Wi5ktMizpkn/CQ8L7bm1
I0JoZfA7ALDufg2Ajyqsqmv3RX2k6ydenmX/AxzQlo34kSXY6X+N+yiPlqhumBqq
Gs2pmvQoyvAmuShhj+eSZsQYBObgjzN7B/SAbbUBT71GerGyWeQ=
=Z7gl
-----END PGP SIGNATURE-----
Merge tag 'kvm-s390-master-6.0-2' of https://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD
More pci fixes
Fix for a code analyser warning
Add max drive-strength for cif_clkout_m0. This fix the issue that
sometimes camera ov5695 is not probed correctly.
Tested on PX30_Mini_EVB_V11_20190507
Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Link: https://lore.kernel.org/r/20220620161321.1898840-2-tommaso.merciai@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
These changes enable PCI, Ethernet and HDA support on Jetson AGX Orin.
DMA support is enabled for I2C on a number of SoC generations and the
Google Pixel C (a.k.a. Smaug) device receives Bluetooth and Wi-Fi
support.
Other than that this also contains some minor cleanups and fixes.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmMkS+cTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSVxEACS52ng2EWzrY27C1nZkka1+1bt9BRs
uKLBrA8BuwGNtyLHirN8TbEaSlg3/dv81lQDVBTYXtxdwudLL9lY2PGdgJaHM1FA
bRKR2eZz6AQdvnQi348mbXRVEG7yWrZi9UCWCQwQ5Q/b1g0k4GJQU9U80acHtRsa
XW6Wj9rlaUayxAMRYkbb+2GecoKk4zrHDqtHrhXJjHurGdzhvNdKZcIWzcXzxHal
jWN81G8FNqf19S1BTkOsV3nwlqwVb9zA02ZAia/HYKIFR9Tsn0s6GlXaDo4F7bB/
yrM6dfe+22ZUd+ivpjrHLnefAM//grvFEBdmuK/tIdnasYa70U6PnOoRhoob8orH
yrJkxgzdWslD2BIDmXKiRvzjoLe8/0nTjMK1drNg6SRRYDXBx0b5atDSPcpTsmcu
nVW+6w7ISHJvQ2FqvTwWXGyw8vjMIsba0vKO5z9E/Xnboy6qFTb7y7032MrHhk7i
HIAHfHQTMEwPFJQnVXZquC0X7lKrY3hKlyjsGcdtqqU0UGyDwU++dtdugF2HP6Na
D7EZkBf+ibXWmIwSAAJRjXf/hbYLIVZHEAX7hQlESHZBI9ckLwxMVCKgwDkU8zus
ZHhUuBQ/dmrEh+hgkYmkIMcGTJSBYtnvMVEB0K/oIB9+nbbuZ4mQ8vu38wrsQa6+
X92eUMCBRB3N7g==
=hMuy
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMtuBAACgkQmmx57+YA
GNmaRxAAhAx+cHVY0rOROQ1bEFhu1C4GYrrcqwkgqsCFLNSU2OMMdSaD700J5RbO
j1ghhXR9jispWZIc6WyjscmClDHcwq/fMjqHfl2Cru243RXSO+LL3Ut/JiBLIBpd
Kj0/14XQzZc43PW3Jnz2SLMSU3recRt8ZMYnl3OxHzJPrXWedYKI2J6uSsPb32fG
n6svKejHaqiFFtsHQhjlqox370wSocArhqh238iUqncOTj23lycO3VZ1Rwk/h8G0
YdAGeeih0NGM2eah1ntYcdclpbILI9Nsme/xD4yCyxByVB5WqwLOkSqyppdRd2UY
KG1Z95UsaNGBZTc/1F7FUGNCUiv/zHys8KysnibhXQniAvoG/sz4E8bFpGSpa76o
hISOFb82q1PPDxUXIWq8deyrGtCZyUkgSEh0tNsuNafec2iOl0/ERvZyTD+6PKlT
xbmtZoT1Wf69s6hh08pzS5cO5FztHXudA754jIRZUFbRquDNoBNDZHa8APKpGxSI
e0+SS1kRgBHgrMXNOJH0UDQtkt1fdbDJWCHvXx1ki/1BjedyQZdkU75D5epEyTLn
F1XTcGbtF5WlgC0vQCL8SEhIA6nqotkZHRSfs0E0+9JadRsH9f9xWgLG+CqGsPzM
/FWS4UnijuiIj5r1lcm0xuLO524tGdGuDdAIBkymehZkpDF1Bjc=
=fOSZ
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v6.1-rc1
These changes enable PCI, Ethernet and HDA support on Jetson AGX Orin.
DMA support is enabled for I2C on a number of SoC generations and the
Google Pixel C (a.k.a. Smaug) device receives Bluetooth and Wi-Fi
support.
Other than that this also contains some minor cleanups and fixes.
* tag 'tegra-for-6.1-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add GPCDMA support for Tegra I2C
arm64: tegra: Add iommus for HDA on Tegra234
arm64: tegra: Enable HDA node for Jetson AGX Orin
arm64: tegra: Add context isolation domains on Tegra234
arm64: tegra: Fixup iommu-map property formatting
arm64: dts: tegra: smaug: Add Wi-Fi node
arm64: dts: tegra: smaug: Add Bluetooth node
arm64: tegra: Enable MGBE on Jetson AGX Orin Developer Kit
arm64: tegra: Add MGBE nodes on Tegra234
arm64: tegra: Fix up compatible for Tegra234 GPCDMA
arm64: tegra: Enable PCIe slots in P3737-0000 board
arm64: tegra: Add P2U and PCIe controller nodes to Tegra234 DT
arm64: tegra: Add regulators required for PCIe
Link: https://lore.kernel.org/r/20220916101957.1635854-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We introduced uaccess pointer masking for arm64 in commit:
4d8efc2d5ee4c9cc ("arm64: Use pointer masking to limit uaccess speculation")
Which was intended to prevent speculative uaccesses to kernel memory on
CPUs where access permissions were not respected under speculation.
At the time, the uaccess primitives were occasionally used to access
kernel memory, with the maximum permitted address held in
thread_info::addr_limit. Consequently, the address masking needed to
take this dynamic limit into account.
Subsequently the uaccess primitives were reworked such that they are
only used for user memory, and as of commit:
3d2403fd10a1dbb3 ("arm64: uaccess: remove set_fs()")
... the address limit was made a compile-time constant, but the logic
was otherwise unchanged.
Regardless of the configured VA size or whether TBI is in use, the
address space can be divided into three ranges:
* The TTBR0 VA range, for which any valid pointer has bit 55 *clear*,
and any non-tag bits [63-56] must match bit 55 (i.e. must be clear).
* The TTBR1 VA range, for which any valid pointer has bit 55 *set*, and
any non-tag bits [63-56] must match bit 55 (i.e. must be set).
* The gap between the TTBR0 and TTBR1 ranges, where bit 55 may be set or
clear, but any access will result in a fault.
As the uaccess primitives are now only used for user memory in the TTBR0
VA range, we can prevent generation of TTBR1 addresses by clearing bit
55, which will either result in a TTBR0 address or a faulting address
between the TTBR VA ranges.
This is beneficial for code generation as:
* We no longer clobber the condition codes.
* We no longer burn a register on (TASK_SIZE_MAX - 1).
* We no longer need to consume the untagged pointer.
When building a defconfig v6.0-rc3 with GCC 12.1.0, this change makes
the resulting Image 64KiB smaller.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20220922151053.3520750-1-mark.rutland@arm.com
[catalin.marinas@arm.com: remove csdb() as the bit clearing is unconditional]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This adds the DSI controller nodes and DSI-DPHY controller nodes to the
rk356x device tree.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20220919164616.12492-4-macroalpha82@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Enable the driver SDHCI support for the Synopsys DWC MSHC
controller which can be found on Rockchip 356x SoCs.
Cc: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Link: https://lore.kernel.org/r/20220922192050.2031-1-linux.amoon@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
An arm64 'allmodconfig' build fails with GCC due to use of a C++-style
comment for the new SVE vector granule 'enum perf_event_arm_regs' entry:
| /usr/include/asm/perf_regs.h:42:26: error: C++ style comments are not allowed in ISO C90
Use good ol' /* */ comment syntax to keep things rosey.
Link: https://lore.kernel.org/r/632cceb2.170a0220.599ec.0a3a@mx.google.com
Fixes: cbb0c02caf4b ("perf: arm64: Add SVE vector granule register to user regs")
Signed-off-by: Will Deacon <will@kernel.org>
Another set of fixes for fixes for the soc tree:
- A fix for the interrupt number on at91/lan966 ethernet PHYs
- A second round of fixes for NXP i.MX series, including a couple
of build issues, and board specific DT corrections on
TQMa8MPQL, imx8mp-venice-gw74xx and imx8mm-verdin for reliability
and partially broken functionality.
- Several fixes for Rockchip SoCs, addressing a USB issue on BPI-R2-Pro,
wakeup on Gru-Bob and reliability of high-speed SD cards, among
other minor issues.
- A fix for a long-running naming mistake that prevented the moxart mmc
driver from working at all.
- Multiple Arm SCMI firmware fixes for hardening some corner cases.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMsf8kACgkQmmx57+YA
GNklew//T+pAuVwhR8OMp3DolbM/CwezgZgEXkuqDS0GvLkuoR71N7y1wEO77CDI
9/luYQiFnMI8ooBMXLG545EJCZNommtDKWfSMjJnYeVQit3nupJSYaOLkzD949hg
fg2BhA3mIKJY53m5SHRfZJOr+Q5E1DEmREX7m9e3nXTDY7izWpE2HtlKt26lKTq4
w4sbchmrC4YRLqkBbSGLczClCakF0/L3QhGUIfBlTdLmhye0PJiQzfhVTKgdb7Jr
l0T8vt5vg+5f5ib3PrnPQCaA3Azgu0QvImwKr7/vU/Sn6/e/xwV/hcuqQBZPFbbl
RmSkHb3mBLXogk/EjLiw8y59D22SIbdtE+/tD+FRP+q0gjgPKobRZiqLFijvIWSB
TtaTsKhotFKFs+pDysF0C/IfpK9MaYcX71WdqfvwlPiGGK7xCt3W+AKzgUmRVfew
dVMeyBlVL9T3003MpLkiaIoDp8JfJsD3051CCH5tdOtF53PeKsgTUEXtnQezBof2
80KgGXg2QGbwx+vYPGJqgQKzG7teq06G4BERK/yeFCrOsxrRXzH/icDA3F5xKY5f
IqQiTqvZeCQvvr8G1iZb6YkhflQHaNktsRCajxERTgPfRzuQFHwF96C/+weGcZBp
edBtweGCJ7AvV8vmvmvCdMDg9BDfgHOOwiNOKqmVvsIO01Ei8Oc=
=fI2K
-----END PGP SIGNATURE-----
Merge tag 'soc-fixes-6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann:
"Another set of fixes for fixes for the soc tree:
- A fix for the interrupt number on at91/lan966 ethernet PHYs
- A second round of fixes for NXP i.MX series, including a couple of
build issues, and board specific DT corrections on TQMa8MPQL,
imx8mp-venice-gw74xx and imx8mm-verdin for reliability and
partially broken functionality
- Several fixes for Rockchip SoCs, addressing a USB issue on
BPI-R2-Pro, wakeup on Gru-Bob and reliability of high-speed SD
cards, among other minor issues
- A fix for a long-running naming mistake that prevented the moxart
mmc driver from working at all
- Multiple Arm SCMI firmware fixes for hardening some corner cases"
* tag 'soc-fixes-6.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits)
arm64: dts: imx8mp-venice-gw74xx: fix port/phy validation
ARM: dts: lan966x: Fix the interrupt number for internal PHYs
arm64: dts: imx8mp-venice-gw74xx: fix ksz9477 cpu port
arm64: dts: imx8mp-venice-gw74xx: fix CAN STBY polarity
dt-bindings: memory-controllers: fsl,imx8m-ddrc: drop Leonard Crestez
arm64: dts: tqma8mqml: Include phy-imx8-pcie.h header
arm64: defconfig: enable ARCH_NXP
arm64: dts: imx8mp-tqma8mpql-mba8mpxl: add missing pinctrl for RTC alarm
ARM: dts: fix Moxa SDIO 'compatible', remove 'sdhci' misnomer
arm64: dts: imx8mm-verdin: extend pmic voltages
arm64: dts: rockchip: Remove 'enable-active-low' from rk3566-quartz64-a
arm64: dts: rockchip: Remove 'enable-active-low' from rk3399-puma
arm64: dts: rockchip: fix property for usb2 phy supply on rk3568-evb1-v10
arm64: dts: rockchip: fix property for usb2 phy supply on rock-3a
arm64: dts: imx8ulp: add #reset-cells for pcc
arm64: dts: tqma8mpxl-ba8mpxl: Fix button GPIOs
arm64: dts: imx8mn: remove GPU power domain reset
arm64: dts: rockchip: Set RK3399-Gru PCLK_EDP to 24 MHz
arm64: dts: imx8mm: Reverse CPLD_Dn GPIO label mapping on MX8Menlo
arm64: dts: rockchip: fix upper usb port on BPI-R2-Pro
...
If FEAT_MTE2 is disabled via the arm64.nomte command line argument on a
CPU that claims to support FEAT_MTE2, the kernel will use Tagged Normal
in the MAIR. If we interpret arm64.nomte to mean that the CPU does not
in fact implement FEAT_MTE2, setting the system register like this may
lead to UNSPECIFIED behavior. Fix it by arranging for MAIR to be set
in the C function cpu_enable_mte which is called based on the sanitized
version of the system register.
There is no need for the rest of the MTE-related system register
initialization to happen from assembly, with the exception of TCR_EL1,
which must be set to include at least TBI1 because the secondary CPUs
access KASan-allocated data structures early. Therefore, make the TCR_EL1
initialization unconditional and move the rest of the initialization to
cpu_enable_mte so that we no longer have a dependency on the unsanitized
ID register value.
Co-developed-by: Evgenii Stepanov <eugenis@google.com>
Signed-off-by: Peter Collingbourne <pcc@google.com>
Signed-off-by: Evgenii Stepanov <eugenis@google.com>
Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 3b714d24ef17 ("arm64: mte: CPU feature detection and initial sysreg configuration")
Cc: <stable@vger.kernel.org> # 5.10.x
Link: https://lore.kernel.org/r/20220915222053.3484231-1-eugenis@google.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Directly check ARM64_SWAPPER_USES_SECTION_MAPS to choose base page
or PMD level huge page mapping in vmemmap_populate() to simplify
code a bit.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Link: https://lore.kernel.org/r/20220920014951.196191-1-wangkefeng.wang@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
arch_dma_prep_coherent() is called when preparing a non-cacheable region
for a consistent DMA buffer allocation. Since the buffer pages may
previously have been written via a cacheable mapping and consequently
allocated as dirty cachelines, the purpose of this function is to remove
these dirty lines from the cache, writing them back so that the
non-coherent device is able to see them.
On arm64, this operation can be achieved with a clean to the point of
coherency; a subsequent invalidation is not required and serves little
purpose in the presence of a cacheable alias (e.g. the linear map),
since clean lines can be speculatively fetched back into the cache after
the invalidation operation has completed.
Relax the cache maintenance in arch_dma_prep_coherent() so that only a
clean, and not a clean-and-invalidate operation is performed.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220823122111.17439-1-will@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Dwarf based unwinding in a function that pushes SVE registers onto
the stack requires the unwinder to know the length of the SVE register
to calculate the stack offsets correctly. This was added to the Arm
specific Dwarf spec as the VG pseudo register[1].
Add the vector length at position 46 if it's requested by userspace and
SVE is supported. If it's not supported then fail to open the event.
The vector length must be on each sample because it can be changed
at runtime via a prctl or ptrace call. Also by adding it as a register
rather than a separate attribute, minimal changes will be required in an
unwinder that already indexes into the register list.
[1]: https://github.com/ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst
Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: James Clark <james.clark@arm.com>
Link: https://lore.kernel.org/r/20220901132658.1024635-2-james.clark@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
With this set the SOF/ITP counter is based on ref_clk when 2.0 ports are
suspended.
snps,dis-u2-freeclk-exists-quirk can be removed as
snps,gfladj-refclk-lpm-sel also clears the free running clock configuration
bit.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220915062855.751881-4-alexander.stein@ew.tq-group.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Introduce wed0 and wed1 nodes in order to enable offloading forwarding
between ethernet and wireless devices on the mt7986 chipset.
Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
cpufreq_get_hw_max_freq() returns max frequency in kHz as *unsigned int*,
while freq_inv_set_max_ratio() gets passed this frequency in Hz as 'u64'.
Multiplying max frequency by 1000 can potentially result in overflow --
multiplying by 1000ULL instead should avoid that...
Found by Linux Verification Center (linuxtesting.org) with the SVACE static
analysis tool.
Fixes: cd0ed03a8903 ("arm64: use activity monitors for frequency invariance")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Link: https://lore.kernel.org/r/01493d64-2bce-d968-86dc-11a122a9c07d@omp.ru
Signed-off-by: Will Deacon <will@kernel.org>
Since commit:
47546a1912fc4a03 ("arm64: mm: install KPTI nG mappings with MMU enabled)"
... when building with CONFIG_DEBUG_ATOMIC_SLEEP=y and booting under
QEMU TCG with '-cpu max', there's a boot-time splat:
| BUG: sleeping function called from invalid context at kernel/locking/mutex.c:580
| in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 15, name: migration/0
| preempt_count: 1, expected: 0
| RCU nest depth: 0, expected: 0
| no locks held by migration/0/15.
| irq event stamp: 28
| hardirqs last enabled at (27): [<ffff8000091ed180>] _raw_spin_unlock_irq+0x3c/0x7c
| hardirqs last disabled at (28): [<ffff8000081b8d74>] multi_cpu_stop+0x150/0x18c
| softirqs last enabled at (0): [<ffff80000809a314>] copy_process+0x594/0x1964
| softirqs last disabled at (0): [<0000000000000000>] 0x0
| CPU: 0 PID: 15 Comm: migration/0 Not tainted 6.0.0-rc3-00002-g419b42ff7eef #3
| Hardware name: linux,dummy-virt (DT)
| Stopper: multi_cpu_stop+0x0/0x18c <- stop_cpus.constprop.0+0xa0/0xfc
| Call trace:
| dump_backtrace.part.0+0xd0/0xe0
| show_stack+0x1c/0x5c
| dump_stack_lvl+0x88/0xb4
| dump_stack+0x1c/0x38
| __might_resched+0x180/0x230
| __might_sleep+0x4c/0xa0
| __mutex_lock+0x5c/0x450
| mutex_lock_nested+0x30/0x40
| create_kpti_ng_temp_pgd+0x4fc/0x6d0
| kpti_install_ng_mappings+0x2b8/0x3b0
| cpu_enable_non_boot_scope_capabilities+0x7c/0xd0
| multi_cpu_stop+0xa0/0x18c
| cpu_stopper_thread+0x88/0x11c
| smpboot_thread_fn+0x1ec/0x290
| kthread+0x118/0x120
| ret_from_fork+0x10/0x20
Since commit:
ee017ee353506fce ("arm64/mm: avoid fixmap race condition when create pud mapping")
... once the kernel leave the SYSTEM_BOOTING state, the fixmap pagetable
entries are protected by the fixmap_lock mutex.
The new KPTI rewrite code uses __create_pgd_mapping() to create a
temporary pagetable. This happens in atomic context, after secondary
CPUs are brought up and the kernel has left the SYSTEM_BOOTING state.
Hence we try to acquire a mutex in atomic context, which is generally
unsound (though benign in this case as the mutex should be free and all
other CPUs are quiescent).
This patch avoids the issue by pulling the mutex out of alloc_init_pud()
and calling it at a higher level in the pagetable manipulation code.
This allows it to be used without locking where one CPU is known to be
in exclusive control of the machine, even after having left the
SYSTEM_BOOTING state.
Fixes: 47546a1912fc ("arm64: mm: install KPTI nG mappings with MMU enabled")
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20220920134731.1625740-1-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
SME introduces an additional EL0 register, TPIDR2_EL0, intended for use
by userspace as part of the SME. Provide ptrace access to it through the
existing NT_ARM_TLS regset used for TPIDR_EL0 by expanding it to two
registers with TPIDR2_EL0 being the second one.
Existing programs that query the size of the register set will be able
to observe the increased size of the register set. Programs that assume
the register set is single register will see no change. On systems that
do not support SME TPIDR2_EL0 will read as 0 and writes will be ignored,
support for SME should be queried via hwcaps as normal.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220829154921.837871-4-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Coresight trace subsystem updates for v6.1 includes:
- Support for HiSilicon PTT trace
- Coresight cleanup of sysfs accessor functions, reduced
code size.
- Expose coresight timestamp source for ETMv4+
- DT binding updates to include missing properties
- Minor documentation, Kconfig text fixes.
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEuFy0byloRoXZHaWBxcXRZPKyBqEFAmMpf/UACgkQxcXRZPKy
BqE58g//cxM7TR4QNsI0IQxHxfDjFxWyiDVLfLxpZK8HHQYbpWZSMq/8Da+BJMNC
UtxaDIPdpMJy1oPcNuLE6tyvhlpK+Mp1BII934LpqvQp14YIjaghWCikYyHy0Awi
Fz1UG46bjcq3L8VA2kg3ShzUmW/SJH4/Lh5yGvnGmQPGP/Kc4Fr/PdY1NNcE+wC4
HeIRCla5rt6LXvNMGWL747pYPwwrG6moIb9JfYiebeD/vmAG1tTubSZFkvEKYTzE
zZRHWJVQaKEAvrP4Ra4/m3ZavvQ6lqrs8GiuwZNsiVvIL+CThIg7/uJDxrJt9X+9
J0qoPP8UmSQYTbFOAfGerrTkRGjk+eb+CAtY3vIN99TMsCVsDCfUN0sOLLKNmHKD
JAO7od8hgPMON4V/B3bKUKU1j66Ufw4v3G3T0QkjGfspMxOfUA7fbr7XXxQ6Dtxf
608OgOG8T2Xww+k5XJMTBXJchM5/SH3gSQwmqoMe5oq6YYN2DNjzf+/M6+uSwQFi
Yy7ONu6mm7OU6XrCvccYQgc33ZY6kUkELKqH3/zPqObx5xLl9zKjX4tFBcy1/CWe
D7tk0+ofPRuistyMV6ECCaIAVj5pWv8hiW7FDfI4okbSM5ah5spONrcaM6lwddPF
B1kVRcYCjZBmVhANsqtMmLxARX2qXgRnHJ6h5TH13C/hmEnoEls=
=rg+8
-----END PGP SIGNATURE-----
Merge tag 'coresight-next-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
Suzuki writes:
"coresight: Changes for v6.1
Coresight trace subsystem updates for v6.1 includes:
- Support for HiSilicon PTT trace
- Coresight cleanup of sysfs accessor functions, reduced
code size.
- Expose coresight timestamp source for ETMv4+
- DT binding updates to include missing properties
- Minor documentation, Kconfig text fixes.
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>"
* tag 'coresight-next-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux:
hwtracing: hisi_ptt: Fix up for "iommu/dma: Make header private"
MAINTAINERS: Add maintainer for HiSilicon PTT driver
docs: trace: Add HiSilicon PTT device driver documentation
hwtracing: hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace device
hwtracing: hisi_ptt: Add trace function support for HiSilicon PCIe Tune and Trace device
iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity
coresight: cti-sysfs: Mark coresight_cti_reg_store() as __maybe_unused
coresight: Make new csdev_access offsets unsigned
coresight: cti-sysfs: Re-use same functions for similar sysfs register accessors
coresight: Re-use same function for similar sysfs register accessors
coresight: Simplify sysfs accessors by using csdev_access abstraction
coresight: Remove unused function parameter
coresight: etm4x: docs: Add documentation for 'ts_source' sysfs interface
coresight: etm4x: Expose default timestamp source in sysfs
dt-bindings: arm: coresight-tmc: Add 'iommu' property
dt-bindings: arm: coresight: Add 'power-domains' property
coresight: docs: Fix a broken reference
coresight: trbe: fix Kconfig "its" grammar
Let's enable ACPI_HMAT, ACPI_HOTPLUG_MEMORY, MEMORY_HOTPLUG
and MEMORY_HOTREMOVE for more test coverage, also there are
useful for heterogeneous memory scene.
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20220629093524.34801-1-wangkefeng.wang@huawei.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The selection of PMUs enabled in the defconfig is currently a bit random
and does not include a number of those provided by Arm and present in a
fairly wide range of SoCs. Improve coverage and defconfig utility by
enabling all the Arm provided PMUs by default.
Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: James Clark <james.clark@arm.com>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20220919162753.3079869-1-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Nathan reports that the build fails when using clang and LTO:
| In file included from kernel/bounds.c:10:
| In file included from ./include/linux/page-flags.h:10:
| In file included from ./include/linux/bug.h:5:
| In file included from ./arch/arm64/include/asm/bug.h:26:
| In file included from ./include/asm-generic/bug.h:5:
| In file included from ./include/linux/compiler.h:248:
| In file included from ./arch/arm64/include/asm/rwonce.h:11:
| ./arch/arm64/include/asm/alternative-macros.h:224:2: error: call to undeclared function 'BUILD_BUG_ON'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
| BUILD_BUG_ON(feature >= ARM64_NCAPS);
| ^
| ./arch/arm64/include/asm/alternative-macros.h:241:2: error: call to undeclared function 'BUILD_BUG_ON'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
| BUILD_BUG_ON(feature >= ARM64_NCAPS);
| ^
| 2 errors generated.
... the problem being that when LTO is enabled, <asm/rwonce.h> includes
<asm/alternative-macros.h>, and causes a circular include dependency
through <linux/bug.h>. This manifests as BUILD_BUG_ON() not being
defined when used within <asm/alternative-macros.h>.
This patch avoids the problem and simplifies the include dependencies by
using compiletime_assert() instead of BUILD_BUG_ON().
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Fixes: 21fb26bfb01f ("arm64: alternatives: add alternative_has_feature_*()")
Reported-by: Nathan Chancellor <nathan@kernel.org>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Link: http://lore.kernel.org/r/YyigTrxhE3IRPzjs@dev-arch.thelio-3990X
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Joey Gouly <joey.gouly@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220920140044.1709073-1-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Range size of 0x2b4 was incorrect since there isn't 173 configurable
pins for muxing. Additionally there is a non-addressable region in the
mapping which requires splitting into two ranges.
main_pmx0 -> 67 pins
main_pmx1 -> 3 pins
Fixes: d361ed88455f ("arm64: dts: ti: Add support for J7200 SoC")
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Vaishnav Achath <vaishnav.a@ti.com>
Link: https://lore.kernel.org/r/20220919205723.8342-1-mranostay@ti.com
Wire up the generic EFI zboot support for arm64.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Jeremy Linton <jeremy.linton@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
With commit 0c24e061196c ("mm: kmemleak: add rbtree and store physical
address for objects allocated with PA"), kmemleak started to put the
objects allocated with physical address onto object_phys_tree_root tree.
The kmemleak_free_part() therefore no longer worked as expected on
physically allocated objects (hyp_mem_base in this case) as it attempted to
search and remove things in object_tree_root tree.
Fix it by using kmemleak_free_part_phys() to unregister hyp_mem_base. This
fixes an immediate crash when booting a KVM host in protected mode with
kmemleak enabled.
Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20220908130659.2021-1-yuzenghui@huawei.com
Move including the rzg2ul-smarc-som.dtsi from the carrier board
rzg2ul-smarc.dtsi to the actual RZ/G2UL SMARC EVK board dts
r9a07g043u11-smarc.dts. Also move the SW_SW0_DEV_SEL and
SW_ET0_EN_N macros to board dts as they are used by SoM and carrier
board DTS/I.
This is in preparation of re-using the SoM and carrier board DTSIs
for RZ/Five SMARC EVK.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220915165256.352843-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family. Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
- CMT,
- SDHI.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f14fde21270bf8269a61a75fc6e50af2765f2a42.1663164707.git.geert+renesas@glider.be
