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220 Commits

Author SHA1 Message Date
monk.liu
e29551556e drm/amdgpu: re-implement fence_default_wait 
use fence_wait_any to implement fence_default_wait

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:48 -04:00
monk.liu
332dfe907b drm/amdgpu: new implement for fence_wait_any (v2) 
origninal method will sleep/schedule at the granurarity of HZ/2 and
based on seq signal method, the new implement is based on kernel fance
interface, no unnecessary schedule at all

v2: replace logic of original amdgpu_fence_wait_any

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:47 -04:00
monk.liu
2e536084f2 drm/amdgpu: use kernel fence interface when possible 
Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:47 -04:00
Chunming Zhou
8128765ce5 drm/amdgpu: use scheduler for VCE ib test 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:46 -04:00
Chunming Zhou
7b5ec43177 drm/amdgpu: use scheduler for UVD ib test 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:45 -04:00
Chunming Zhou
0011fdaa4d drm/amdgpu: use gpu scheduler for sdma ib test 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:45 -04:00
Chunming Zhou
42d13693c0 drm/amdgpu: Use gpu scheduler for gfx ring ib test 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:44 -04:00
Chunming Zhou
3c704e934d drm/amdgpu: add helper function for kernel submission 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:44 -04:00
Chunming Zhou
d1ff9086c1 drm/amdgpu: fix seq in ctx_add_fence 
if enabling scheduler, then the queued seq is assigned
when pushing job before emitting job.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:43 -04:00
Chunming Zhou
51b9db27d0 drm/amdgpu: wait forever for wait emit 
the job must be emitted by scheduler, otherwise scheduler is abnormal.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:42 -04:00
Jammy Zhou
4afcb30383 drm/amdgpu: add amdgpu.sched_hw_submission option 
This option can be used to specify the max number of submissions in the
active HW queue. The default value is 2 now.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
 2015-08-17 16:50:42 -04:00
Jammy Zhou
1333f723fb drm/amdgpu: add amdgpu.sched_jobs option 
This option can be used to specify the max job number in the job queue,
and it is 16 by default.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
 2015-08-17 16:50:41 -04:00
Christian König
1d3897e056 drm/amdgpu: fix syncing to VM updates 
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:40 -04:00
Chunming Zhou
afe1008149 drm/amdgpu: add check for callback 
it is possible that the callback isn't defined sometimes.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian K?nig <christian.koenig@amd.com>
 2015-08-17 16:50:39 -04:00
Jammy Zhou
02b9f0bfd4 drm/amdgpu: add enable_scheduler module option 
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:39 -04:00
Chunming Zhou
176e1ab1b5 drm/amdgpu: protect fence_process from multiple context 
fence_process may be called from kthread, user thread and interrupt context.
it is possible to called concurrently, then will wake up fence queue multiple times.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:38 -04:00
Chunming Zhou
e0d8f3c34e drm/amdgpu: add sched isr to fence process 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:38 -04:00
Chunming Zhou
d5fc5e82a3 drm/amdgpu: dispatch job for vm 
use kernel context to submit command for vm

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:37 -04:00
Chunming Zhou
23ca0e4e47 drm/amdgpu: add kernel ctx support (v2) 
v2: rebase against kfd changes

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:36 -04:00
Chunming Zhou
4274f5d45c drm/amdgpu: prepare job before push to sw queue for pte ring 
user mode will still use pte ring as a normal ring.
if the prepare job generates another command(update pte) on its ring in scheduler,
then will kill scheduler which is going to waiting later job but pending running job.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:36 -04:00
Chunming Zhou
4b559c90bc drm/amdgpu: make sure the fence is emitted before ring to get it. 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:35 -04:00
Chunming Zhou
b43a9a7e87 drm/amdgpu: use scheduler user seq instead of previous user seq 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:35 -04:00
Chunming Zhou
049fc527b4 drm/amdgpu: dispatch jobs in cs 
BO validation is moved to scheduler except usrptr which must be validated
in user process

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:34 -04:00
Chunming Zhou
372bc1e18c drm/amdgpu: add bo list copy 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:33 -04:00
Chunming Zhou
c1b69ed0c6 drm/amdgpu: add backend implementation of gpu scheduler (v2) 
v2: fix rebase breakage

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:33 -04:00
Chunming Zhou
2c4888a0d3 drm/amdgpu: disable hw semaphore with scheduler 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:32 -04:00
Chunming Zhou
9cb7e5a91f drm/amdgpu: add context entity init 
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:32 -04:00
Alex Deucher
b80d8475c1 drm/amdgpu: add scheduler initialization 
1. Add kernel parameter option, default 0
2. Add scheduler initialization for amdgpu

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:31 -04:00
David Zhang
2da78e21d1 drm/amdgpu: Enable the Fiji DID 0x7300 support 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:30 -04:00
Alex Deucher
d07f5c4c23 drm/amdgpu: remove VM workaround for Fiji 
The bug is fixed in fiji.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:29 -04:00
Alex Deucher
188a9bcd6c drm/amdgpu: add support for VCE 3.x on Fiji 
VCE on fiji is single pipe only.

Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:29 -04:00
David Zhang
974ee3db0f drm/amdgpu: Add Fiji support to the UVD 6.0 IP module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:28 -04:00
David Zhang
1a5bbb6695 drm/amdgpu: Add Fiji support to the SDMA 3.0 IP module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:27 -04:00
David Zhang
af15a2d51d drm/amdgpu: Add Fiji support to the GFX 8.0 IP module (v2) 
v2: agd5f: fix the rb setup.

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:27 -04:00
David Zhang
843908604d drm/amdgpu: Add Fiji support to the DCE 10.0 IP module (v2) 
v2: agd5f: fix up XDMA golden settings

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:26 -04:00
David Zhang
8e711e1a1a drm/amdgpu: Add Fiji support to SMC and DPM (v2) 
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:26 -04:00
David Zhang
aa8a3b5395 drm/amdgpu: Add Fiji support to IH module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:24 -04:00
David Zhang
127a262853 drm/amdgpu: Add Fiji support to the GMC 8.5 IP module 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:24 -04:00
David Zhang
48299f95f7 drm/amdgpu: Add Fiji DID 0x7300 common support 
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:23 -04:00
Alex Deucher
41548ef78b drm/amdgpu: handle conditional support for CIK properly 
gfx7 support is not necessary or available if CIK support
is not enabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:23 -04:00
monk.liu
e60b344f6c drm/amdgpu: optimize amdgpu_parser_init 
use kmalloc_array instead of kcalloc where appropriate and other
cleanups.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:22 -04:00
Jammy Zhou
2f7d10b393 drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2) 
Make the definitions common for all driver components

v2: fix kfd

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:21 -04:00
Marek Olšák
c7890fea04 drm/amdgpu: allow userspace to read more debug registers 
Feel free to suggest more.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2015-08-17 16:50:20 -04:00
Alex Deucher
8e9198d069 drm/amdgpu: move some atombios definitions to common folder (v2) 
the definitions can be shared by different IP components.

v2: fix include path

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:19 -04:00
Christian König
5430a3ffb0 drm/amdgpu: fix UVD/VCE fence handling 
We need to return the sequence number to userspace
even when we don't use user fences.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:18 -04:00
Alex Deucher
5ceb54c68a drm/amdgpu: add fence suspend/resume functions 
Added to:
- handle draining the ring on suspend
- properly enable/disable interrupts on suspend and resume

Fix breakages from:
commit 467ee3be53d240d08beed2e82a941e820c1ac323
Author: Chunming Zhou <david1.zhou@amd.com>
Date:   Mon Jun 1 14:14:32 2015 +0800

    drm/amdgpu: always enable EOP interrupt v2

Tested-by: Audrey Grodzovsky <audrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2015-08-17 16:50:18 -04:00
Chunming Zhou
c6a4079bad drm/amdgpu: always enable EOP interrupt v2 
v2 (chk): always enable EOP interrupt, independent of scheduler,
	  remove now unused delayed_irq handling.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:17 -04:00
Christian König
7f8a5290f5 drm/amdgpu: rework vm_grab_id interface 
This makes assigning VM IDs independent from the use of VM IDs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:16 -04:00
Christian König
fc8fa5e428 drm/amdgpu: no updates shouldn't cause vm flush v2 
v2 (chk): split fix from original patch

Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:16 -04:00
Christian König
cf6f1d3949 drm/amdgpu: fix signed overrun in amdgpu_ctx_get_fence 
Otherwise the first 16 fences of a context will always signal immediately.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
 2015-08-17 16:50:15 -04:00