2 Commits

Author	SHA1	Message	Date
Krzysztof Kozlowski	8bbec86ce6	dt-bindings: PCI: fsl,imx6q: fix assigned-clocks warning ... assigned-clocks are a dependency of clocks, however the dtschema has limitation and expects clocks to be present in the binding using assigned-clocks, not in other referenced bindings. The clocks were defined in common fsl,imx6q-pcie-common.yaml, which is referenced by fsl,imx6q-pcie-ep.yaml. The fsl,imx6q-pcie-ep.yaml used assigned-clocks thus leading to warnings: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.example.dtb: pcie-ep@33800000: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected) From schema: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml Fix this by moving clocks to each specific schema from the common one and narrowing them to strictly match what is expected for given device. Fixes: b10f82380eeb ("dt-bindings: imx6q-pcie: Restruct i.MX PCIe schema") Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> Link: https://lore.kernel.org/r/20230508071837.68552-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>	2023-05-09 08:01:49 +02:00
Richard Zhu	b10f82380e	dt-bindings: imx6q-pcie: Restruct i.MX PCIe schema ... Restruct i.MX PCIe schema, derive the common properties, thus they can be shared by both the RC and Endpoint schema. Update the description of fsl,imx6q-pcie.yaml, and move the EP mode compatible to fsl,imx6q-pcie-ep.yaml. Add support for i.MX8M PCIe Endpoint modes, and update the MAINTAINER accordingly. Link: https://lore.kernel.org/r/1676441915-1394-2-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org>	2023-04-07 09:52:26 +02:00