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This adds the CCPLEX cluster on Tegra186, which is used to initiate CPU
frequency and voltage transitions.
Also included is a bit of cleanup for PCI related device tree content,
in preparation for a future DTC release that has additional checks for
the PCI bus.
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Merge tag 'tegra-for-4.13-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64
arm64: tegra: Device tree changes for v4.13-rc1
This adds the CCPLEX cluster on Tegra186, which is used to initiate CPU
frequency and voltage transitions.
Also included is a bit of cleanup for PCI related device tree content,
in preparation for a future DTC release that has additional checks for
the PCI bus.
* tag 'tegra-for-4.13-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: dts: nvidia: fix PCI bus dtc warnings
arm64: tegra: Add CCPLEX_CLUSTER area in Tegra186
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Adds support for Coresight CPU debug MMIO interface on all Juno variants.
2. Enables support for few SMMUs on Juno which were previously disabled
waiting for IOMMU-backed DMA API support to be stabilised.
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Merge tag 'juno-updates-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
ARMv8 Vexpress/Juno DT updates for v4.13
1. Adds support for Coresight CPU debug MMIO interface on all Juno variants.
2. Enables support for few SMMUs on Juno which were previously disabled
waiting for IOMMU-backed DMA API support to be stabilised.
* tag 'juno-updates-4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: enable some SMMUs
arm64: dts: juno: add coresight CPU debug nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
Just like the H3, this is mostly about enabling the EMAC on the H5, and
also has a new board, the Orange Pi Zero Plus 2
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Merge tag 'sunxi-dt-h5-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64
Allwinner H5 DT changes for 4.13
Just like the H3, this is mostly about enabling the EMAC on the H5, and
also has a new board, the Orange Pi Zero Plus 2
* tag 'sunxi-dt-h5-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: h5: Add initial Orangepi Zero Plus 2 support
arm64: allwinner: h5: enable dwmac-sun8i for Nano Pi NEO2
arm64: allwinner: h5: enable dwmac-sun8i for Orange Pi Prime
arm64: allwinner: h5: sort the device nodes in / part for some boards
arm64: allwinner: h5: add support for NanoPi NEO2 board
arm64: allwinner: h5: add support for Orange Pi Prime board
arm64: allwinner: orangepi-pc2: Enable dwmac-sun8i
arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver
arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control module
ARM: sunxi: h3-h5: Convert R_CCU raw numbers to macros
Signed-off-by: Olof Johansson <olof@lixom.net>
A few fixes around the PRCM support that got in 4.12 with a wrong
compatible, and a missing clock in the binding.
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Merge tag 'sunxi-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into fixes
Allwinner fixes for 4.12
A few fixes around the PRCM support that got in 4.12 with a wrong
compatible, and a missing clock in the binding.
* tag 'sunxi-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: Add PLL_PERIPH0 clock to the R_CCU
ARM: sunxi: h3-h5: Add PLL_PERIPH0 clock to the R_CCU
arm64: allwinner: h5: Remove syslink to shared DTSI
ARM: sunxi: h3/h5: fix the compatible of R_CCU
Signed-off-by: Olof Johansson <olof@lixom.net>
Our usual arm64 changes. The most notable things are the EMAC support and
USB support enhancements. There's also support for the SoPine SoM, and the
OrangePi Win.
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Merge tag 'sunxi-dt64-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt64
Allwinner arm64 DT changes for 4.13
Our usual arm64 changes. The most notable things are the EMAC support and
USB support enhancements. There's also support for the SoPine SoM, and the
OrangePi Win.
* tag 'sunxi-dt64-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support
arm64: allwinner: a64: add device tree for SoPine with baseboard
arm64: allwinner: bananapi-m64: Enable dwmac-sun8i
arm64: allwinner: pine64-plus: Enable dwmac-sun8i
arm64: allwinner: pine64: Enable dwmac-sun8i
arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver
arm64: allwinner: sun50i-a64: Add dt node for the syscon control module
arm64: allwinner: a64: add DTSI file for SoPine SoM
arm64: allwinner: a64: Convert CCU raw number references to macros
arm64: dts: allwinner: pine64: Prepare optional UART nodes with pinctrl
arm64: allwinner: a64: enable RSB on A64
arm64: dts: allwinner: pine64: Add remaining UART aliases
arm64: dts: allwinner: a64: Add UART2 pin nodes
arm64: allwinner: a64: enable EHCI0/OHCI0 for Pine64
arm64: allwinner: a64: add EHCI0/OHCI0 nodes to A64 DTSI
Signed-off-by: Olof Johansson <olof@lixom.net>
- enable meson SPICC as module
- enable IR core, decoders and Meson IR device
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Merge tag 'amlogic-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/arm64
Amlogic arm64 defconfig changes for v4.13
- enable meson SPICC as module
- enable IR core, decoders and Meson IR device
* tag 'amlogic-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: defconfig: enable meson SPICC as module
ARM64: defconfig: enable IR core, decoders and Meson IR device
Signed-off-by: Olof Johansson <olof@lixom.net>
following:
- Florian enables ARCH_BRCMSTB in the arm64 defconfig to get more build coverage
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Merge tag 'arm-soc/for-4.13/defconfig-arm64' of http://github.com/Broadcom/stblinux into next/arm64
This pull request contains ARM64 defconfig changes for 4.13, please pull the
following:
- Florian enables ARCH_BRCMSTB in the arm64 defconfig to get more build coverage
* tag 'arm-soc/for-4.13/defconfig-arm64' of http://github.com/Broadcom/stblinux:
arm64: defconfig: Enable ARCH_BRCMSTB
Signed-off-by: Olof Johansson <olof@lixom.net>
4.13. Please note the following from Eric:
I've based this summary on the bcm2835-dt-next tag, to clarify what's in this
patch series, but it does require being careful since it involves a cross-merge
between branches.
- Anup documents the Broadcom Stingray binding, common clocks, adds initial
support for the Stingray DTSI and DTS files and adds support for the PL022,
PL330 and SP805
- Sandeep adds the clock nodes to the Stingray Device Tree nodes
- Pramod adds support for the NAND, pinctrl, GPIO to the Stingray Device Tree nodes
- Oza adds I2C Device Tree nodes to the Stingray DTSes
- Srinath adds PWM and SDHCI Device Tree nodes for the Stingray SoC
- Ravijeta adds support for the USB Dual Role PHY on Northstar 2
- Gerd starts adding references to the sdhost and sdhci controllers, and then
switches the sdcard to to use the SDHOST (faster than SDHCI)
- Stefan defines the BCM2837 thermal coefficients in order for the Raspberry Pi
thermal driver to work correctly
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Merge tag 'arm-soc/for-4.13/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
This pull request contains Broadcom ARM64-based SoCs Device Tree changes for
4.13. Please note the following from Eric:
I've based this summary on the bcm2835-dt-next tag, to clarify what's in this
patch series, but it does require being careful since it involves a cross-merge
between branches.
- Anup documents the Broadcom Stingray binding, common clocks, adds initial
support for the Stingray DTSI and DTS files and adds support for the PL022,
PL330 and SP805
- Sandeep adds the clock nodes to the Stingray Device Tree nodes
- Pramod adds support for the NAND, pinctrl, GPIO to the Stingray Device Tree nodes
- Oza adds I2C Device Tree nodes to the Stingray DTSes
- Srinath adds PWM and SDHCI Device Tree nodes for the Stingray SoC
- Ravijeta adds support for the USB Dual Role PHY on Northstar 2
- Gerd starts adding references to the sdhost and sdhci controllers, and then
switches the sdcard to to use the SDHOST (faster than SDHCI)
- Stefan defines the BCM2837 thermal coefficients in order for the Raspberry Pi
thermal driver to work correctly
* tag 'arm-soc/for-4.13/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2: Add USB DRD PHY device tree node
ARM64: dts: bcm2837: Define CPU thermal coefficients
arm64: dts: Add PWM and SDHCI DT nodes for Stingray SOC
arm64: dts: Add PL022, PL330 and SP805 DT nodes for Stingray
arm64: dts: Add I2C DT nodes for Stingray SoC
arm64: dts: Add GPIO DT nodes for Stingray SOC
arm64: dts: Add pinctrl DT nodes for Stingray SOC
arm64: dts: Add NAND DT nodes for Stingray SOC
arm64: dts: Add clock DT nodes for Stingray SOC
arm64: dts: Initial DTS files for Broadcom Stingray SOC
dt-bindings: clk: Extend binding doc for Stingray SOC
dt-bindings: bcm: Add Broadcom Stingray bindings document
ARM: dts: bcm283x: switch from &sdhci to &sdhost
arm64: dts: bcm2837: add &sdhci and &sdhost
ARM: dts: bcm283x: Add CPU thermal zone with 1 trip point
ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6)
Signed-off-by: Olof Johansson <olof@lixom.net>
mt8173:
- split USB SuperSpeed port in HighSpeed and SuperSpeed ports.
- move USB phy clocks up in hierarchy to met new bindings description
- move MDP nodes up in hierarchy to met new bindings description
mt6797:
- add basic SoC support
- add clock driver
- add power domain
dt-bindings:
- clean-up i2c binding description
- add binding for mt2701 i2c node
- add fallback compatible to scpsys binding description
- add bindings description for mt7622 and mt6796
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Merge tag 'v4.12-next-dts64' of https://github.com/mbgg/linux-mediatek into next/dt64
Add device tree nodes for
mt8173:
- split USB SuperSpeed port in HighSpeed and SuperSpeed ports.
- move USB phy clocks up in hierarchy to met new bindings description
- move MDP nodes up in hierarchy to met new bindings description
mt6797:
- add basic SoC support
- add clock driver
- add power domain
dt-bindings:
- clean-up i2c binding description
- add binding for mt2701 i2c node
- add fallback compatible to scpsys binding description
- add bindings description for mt7622 and mt6796
* tag 'v4.12-next-dts64' of https://github.com/mbgg/linux-mediatek:
dt-bindings: mediatek: add bindings for MediaTek MT7622 SoC
arm64: dts: mt8173: Fix mdp device tree
dt-bindings: i2c: Add Mediatek MT2701 i2c binding
dt-bindings: i2c-mtk: Add mt7623 binding
dt-bindings: i2c-mtk: Delete bindings
dt-bindings: i2c-mt6577: Rename file to reflect bindings
dt-bindings: mtk-sysirq: Correct bindings for supported SoCs
arm64: dts: mediatek: add clk and scp nodes for MT6797
dt-bindings: mediatek: add MT6797 power dt-bindings
arm64: dts: mediatek: add mt6797 support
dt-bindings: mediatek: Add bindings for mediatek MT6797 Platform
arm64: dts: mt8173: move clock from phy node into port nodes
arm64: dts: mt8173: split usb SuperSpeed port into two ports
Signed-off-by: Olof Johansson <olof@lixom.net>
make usage of pci switches possible; some more qos and pinctrl nodes on
rk3399; updates for the rk3399 cpu operating points including separate
opps for the higher rates OP1 variant of the chip and mmc-nodes for
the rk3328.
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Merge tag 'v4.13-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
Support for the new rk3399 firefly board; extending the pcie ranges to
make usage of pci switches possible; some more qos and pinctrl nodes on
rk3399; updates for the rk3399 cpu operating points including separate
opps for the higher rates OP1 variant of the chip and mmc-nodes for
the rk3328.
* tag 'v4.13-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: update common rk3399 operating points
arm64: dts: rockchip: introduce rk3399-op1 operating points
arm64: dts: rockchip: enable usb3 controllers on rk3399-firefly
arm64: dts: rockchip: add ethernet0 alias on rk3399
arm64: dts: rockchip: bring rk3399-firefly power-tree in line
arm64: dts: rockchip: add sdmmc/sdio/emmc nodes for RK3328 SoCs
arm64: dts: rockchip: extent IORESOURCE_MEM_64 of PCIe for rk3399
arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399
arm64: dts: rockchip: add pinctrl settings for some rk3399 peripherals
arm64: dts: rockchip: add some missing qos nodes on rk3399
arm64: dts: rockchip: add support for firefly-rk3399 board
dt-bindings: add firefly-rk3399 board support
Signed-off-by: Olof Johansson <olof@lixom.net>
Add Device Trees for Actions Semiconductor S900 SoC and
uCRobotics Bubblegum-96 board.
UART0/1/4/6 interrupts are guesses.
Cc: 96boards@ucrobotics.com
Signed-off-by: Andreas Färber <afaerber@suse.de>
Add the description of the xMDIO bus for the Marvell Armada 7k and
Marvell Armada 8k; for both CP110 slave and master. This bus is found
on Marvell Ethernet controllers and provides an interface with the
xMDIO bus.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The cryptographic engine found on the cp110 slave is disabled by default
because of some known limitations. Add a comment to explain why it is
disabled by default.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The cryptographic engine on the master cp110 is now enabled by default
at the SoC level. Remove its dts nodes that were only enabling it.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable the cryptographic engine at the SoC level on the master cp110.
This engine is always present and do not depends on any pinmux
configuration.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
By adding this regulator, the SD cards are usable at higher speed
protocols such as SDR104.
This patch was tested with an SD HC card compatible with UHS-I.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 37xx SoCs has 2 SDHCI interfaces. This patch adds the second
one.
Moreover, the Armada 37xx DB v2 board populates the 2 SDHCI interfaces.
The second interface is using pluggable module that can either
have an SD connector or eMMC on it.
This patch adds support for SD module in the device DT.
[ gregory.clement@free-electrons.com:
- Add more detail in commit log
- Sort the dt node in address order
- Document the SD slot in the dts ]
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
When several groups of register address and size are used with reg, then
surround each one by angle bracket.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The initial device tree file was for the board V1.4. Now the V2.0 board
is also available. The same dtb will work for both, but the CON number
have changed, so update the comment in the dts to reflect this.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Sort the reference nodes in alphabetical order to ease the merge of
future nodes.
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Disable the mdio nodes by default in the cp110 slave and master dtsi as
they're not wired on every board.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Explicitly enable the MDIO nodes in the Marvell Armada 7k DB and Marvell
Armada 8k DB. This is needed as the MDIO nodes will be disabled in the
CP 110 slave and master dtsi by a following up patch.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The EIP197 cryptographic engine supports 64 bits address width but is
limited to 40 bits on 7k/8k. Add a dma-mask property in the
cryptographic engine nodes to reflect this.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable the 1GB Ethernet interface that lives on the slave CP110,
with its corresponding phy (that oddly lives on the master CP110).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add the three required clocks for the MDIO interface to be functional
on Armada 8k platforms. Without this, the CPU hangs, causing RCU
stalls or the system to become unresponsive.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
[Thomas:
- remove mg_core_clock, since it's a parent of mg_clock
- also add clock references to the slave CP mdio instance]
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The new binding for the system controller on ap806 moved the clock into a
subnode. This preliminary step will allow to add gpio and pinctrl
subnodes
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The clock-output-names of the ap806-system-controller node are not used
anymore, so remove them.
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Armada 8040 DB is equipped with 4 (2x 10G SFI + 2x 1G RGMII)
ethernet ports of which only one was hitherto enabled.
Because currently mvpp2 driver is capable of supporting only
1G RGMII/SGMII, enable second port from CP slave HW block.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add sdhci support for MACCHIATOBin boards. This uses the AP806 SDHCI
for eMMC and CP110 master for the SD card slot.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The XORv2 engines in the AP side of the Armada 7K/8K SoCs are using the
AP MS core clock as input, so this commit adds the appropriate clocks
properties.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add nodes for the SPICC controller on GX common dtsi, GXBB and
GXL dtsi files.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add entry for k3-dma driver and i2s/hdmi audio devices.
This enables HDMI audio output.
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Liam Girdwood <lgirdwood@gmail.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: Jaroslav Kysela <perex@perex.cz>
Cc: Takashi Iwai <tiwai@suse.com>
Cc: Wei Xu <xuwei5@hisilicon.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Andy Green <andy@warmcat.com>
Cc: Dave Long <dave.long@linaro.org>
Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Antonio Borneo <borneo.antonio@gmail.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: John Stultz <john.stultz@linaro.org>
v2:
* Split core i2s entry into dtsi and hdmi specific bits into
hikey dts
v4:
* Rework simple-card to use many-dai-links method, as
there may be other links in the future
v5:
* Rework audio description to use the audio-card-graph method
as requested by Mark.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add nodes for WiFi. HiKey960 is using TI WL1837MOD module.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The kernel watchdog is a great debugging tool for finding tasks that
consume a disproportionate amount of CPU time in contiguous chunks. One
can imagine building a similar watchdog for arbitrary driver threads
using save_stack_trace_tsk() and print_stack_trace(). However, this is
not viable for dynamically loaded driver modules on ARM platforms
because save_stack_trace_tsk() is not exported for those architectures.
Export save_stack_trace_tsk() for the ARM64 architecture to align with
x86 and support various debugging use cases such as arbitrary driver
thread watchdog timers.
Signed-off-by: Dustin Brown <dustinb@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The Hi3660 SoC comes with the sp804 timer in addition to the
architecture timers. These ones are shutdown when reaching a deep idle
states and a backup timer is needed. The sp804 belongs to another power
domain and can fulfill the purpose of replacing temporarily an
architecture timer when the CPU is idle.
Describe it in the device tree, so it can be enabled at boot time.
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Add spi2 and spi3 device nodes for hi3660, and enable them for hikey960.
On HiKey960:
- SPI2 is wired out through low speed expansion connector.
- SPI3 is wired out through high speed expansion connector.
Signed-off-by: Wang Xiaoyin <hw.wangxiaoyin@hisilicon.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
HiKey960 has four user LEDs, and two special purpose LEDs: WiFi and BT
respectively.
All of them are implemented as GPIO.
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
We use gpio_034 as power key on hikey960, and set gpio with pull-up
state, when key press the voltage on the gpio will come to lower, and
power key event will be reported.
Signed-off-by: Chen Jun <chenjun14@huawei.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
