16 Commits

Author SHA1 Message Date
Konrad Dybcio
9e7f7b65c7 arm64: dts: qcom: sm[68]350: Use interrupts-extended with pdc interrupts
Using interrupts = <&pdc X Y> makes the interrupt framework interpret this as
the &pdc-nth range of the main interrupt controller (GIC). Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211114012755.112226-5-konrad.dybcio@somainline.org
2021-11-20 16:24:57 -06:00
Luca Weiss
cd10fb7993 arm64: dts: qcom: sm6350: add debug uart
Add the necessary nodes for the debug uart on SM6350.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211007212444.328034-8-luca@z3ntu.xyz
2021-10-23 22:07:08 -05:00
Konrad Dybcio
4ef13f7fe4 arm64: dts: qcom: sm6350: Add apps_smmu and assign iommus prop to USB1
Add a node for the APPS SMMU to allow for managing memory access to peripherals
such as the USB controller.

While at it, add iommus property to the USB1 node to make sure its registers can
be accessed, as they seem to be gated by default.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-15-konrad.dybcio@somainline.org
2021-09-27 17:21:29 -05:00
Konrad Dybcio
1797e1c9a9 arm64: dts: qcom: sm6350: Add SDHCI1/2 nodes
Add SDHCI1/2 nodes for eMMC and uSD card respectively.
Do note that most SM6350 devices seem to come with UFS.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Replaced SM6350_CX with its constant value]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-14-konrad.dybcio@somainline.org
2021-09-27 17:21:29 -05:00
Konrad Dybcio
9264d3c8ee arm64: dts: qcom: sm6350: Add RPMHPD and BCM voter
Add RPMHPD node, its OPP table and BCM voter to prepare for performance level
voting.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-13-konrad.dybcio@somainline.org
2021-09-27 17:21:29 -05:00
Konrad Dybcio
574af54562 arm64: dts: qcom: sm6350: Add PRNG node
Add a node for the PRNG to enable hw-accelerated pseudo-random number
generation.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-12-konrad.dybcio@somainline.org
2021-09-27 17:21:29 -05:00
Konrad Dybcio
001eaf9514 arm64: dts: qcom: sm6350: Add SPMI bus
Add a node for SPMI to allow for communication with on-board PMICs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-11-konrad.dybcio@somainline.org
2021-09-27 17:21:29 -05:00
Konrad Dybcio
8fe2e0d9db arm64: dts: qcom: sm6350: Add AOSS_QMP
Add a node for AOSS_QMP in preparation for remote processor enablement.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-10-konrad.dybcio@somainline.org
2021-09-27 17:21:29 -05:00
Konrad Dybcio
25e0ae6848 arm64: dts: qcom: sm6350: Add TSENS nodes
Add nodes required for TSENS block using the common qcom,tsens-v2 binding.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-9-konrad.dybcio@somainline.org
2021-09-27 17:21:29 -05:00
Konrad Dybcio
3cc415413f arm64: dts: qcom: sm6350: Add cpufreq-hw support
Add cpufreq-hw node and assign qcom,freq-domain properties to CPUs to enable
CPU clock scaling.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-8-konrad.dybcio@somainline.org
2021-09-27 17:21:28 -05:00
Konrad Dybcio
23737b9557 arm64: dts: qcom: sm6350: Add USB1 nodes
Add nodes required for USB1 to function. SM6350 (thankfully) resuses SDM845 and
SC7180 IP, so no additional code porting is required.

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Renamed dwc3 node "usb"]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-7-konrad.dybcio@somainline.org
2021-09-27 17:21:15 -05:00
Konrad Dybcio
538f4bcd51 arm64: dts: qcom: sm6350: Add TLMM block node
Add TLMM pinctrl node to enable referencing the SoC pins in other nodes.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-6-konrad.dybcio@somainline.org
2021-09-27 17:11:13 -05:00
Konrad Dybcio
30de1108df arm64: dts: qcom: sm6350: Add GCC node
Add and configure GCC node to allow for referencing GCC-controlled clocks
in other nodes.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-5-konrad.dybcio@somainline.org
2021-09-27 17:11:13 -05:00
Konrad Dybcio
985e02e7c0 arm64: dts: qcom: sm6350: Add RPMHCC node
Add RPMHCC node to allow for referencing RPMH-controlled clocks in other
nodes.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-4-konrad.dybcio@somainline.org
2021-09-27 17:11:13 -05:00
Konrad Dybcio
ced2f0d75e arm64: dts: qcom: sm6350: Add LLCC node
Add a node for LLCC with SM6350-specific compatible.

Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-3-konrad.dybcio@somainline.org
2021-09-27 17:11:13 -05:00
Konrad Dybcio
5f82b9cda6 arm64: dts: qcom: Add SM6350 device tree
Add a base DT for SM6350 SoC

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210923162204.21752-2-konrad.dybcio@somainline.org
2021-09-27 17:11:13 -05:00