IF YOU WOULD LIKE TO GET AN ACCOUNT, please write an
email to Administrator. User accounts are meant only to access repo
and report issues and/or generate pull requests.
This is a purpose-specific Git hosting for
BaseALT
projects. Thank you for your understanding!
Только зарегистрированные пользователи имеют доступ к сервису!
Для получения аккаунта, обратитесь к администратору.
commit c9260693aa0c1e029ed23693cfd4d7814eee6624 upstream.
Commit ac91e6980563 ("PCI: Unify delay handling for reset and resume")
shortened an unconditional 1 sec delay after a Secondary Bus Reset to 100
msec for PCIe (per PCIe r6.1 sec 6.6.1). The 1 sec delay is only required
for Conventional PCI.
But it turns out that there are PCIe devices which require a longer delay
than prescribed before first config space access after reset recovery or
resume from D3cold:
Chad reports that a "VideoPropulsion Torrent QN16e" MPEG QAM Modulator
"raises a PCI system error (PERR), as reported by the IPMI event log, and
the hardware itself would suffer a catastrophic event, cycling the server"
unless the longer delay is observed.
The card is specified to conform to PCIe r1.0 and indeed only supports Gen1
speed (2.5 GT/s) according to lspci. PCIe r1.0 sec 7.6 prescribes the same
100 msec delay as PCIe r6.1 sec 6.6.1:
To allow components to perform internal initialization, system software
must wait for at least 100 ms from the end of a reset (cold/warm/hot)
before it is permitted to issue Configuration Requests
The behavior of the Torrent QN16e card thus appears to be a quirk. Treat
it as such and lengthen the reset delay for this specific device.
Fixes: ac91e6980563 ("PCI: Unify delay handling for reset and resume")
Link: https://lore.kernel.org/r/47727e792c7f0282dc144e3ec8ce8eb6e713394e.1695304512.git.lukas@wunner.de
Reported-by: Chad Schroeder <CSchroeder@sonifi.com>
Closes: https://lore.kernel.org/linux-pci/DM6PR16MB2844903E34CAB910082DF019B1FAA@DM6PR16MB2844.namprd16.prod.outlook.com/
Tested-by: Chad Schroeder <CSchroeder@sonifi.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org # v5.4+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 83a939f0fdc208ff3639dd3d42ac9b3c35607fd2 upstream.
With CONFIG_PCI_EXYNOS=y and exynos_pcie_remove() marked with __exit, the
function is discarded from the driver. In this case a bound device can
still get unbound, e.g via sysfs. Then no cleanup code is run resulting in
resource leaks or worse.
The right thing to do is do always have the remove callback available.
This fixes the following warning by modpost:
WARNING: modpost: drivers/pci/controller/dwc/pci-exynos: section mismatch in reference: exynos_pcie_driver+0x8 (section: .data) -> exynos_pcie_remove (section: .exit.text)
(with ARCH=x86_64 W=1 allmodconfig).
Fixes: 340cba6092c2 ("pci: Add PCIe driver for Samsung Exynos")
Link: https://lore.kernel.org/r/20231001170254.2506508-2-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 3064ef2e88c1629c1e67a77d7bc20020b35846f2 upstream.
With CONFIG_PCIE_KIRIN=y and kirin_pcie_remove() marked with __exit, the
function is discarded from the driver. In this case a bound device can
still get unbound, e.g via sysfs. Then no cleanup code is run resulting in
resource leaks or worse.
The right thing to do is do always have the remove callback available.
This fixes the following warning by modpost:
drivers/pci/controller/dwc/pcie-kirin: section mismatch in reference: kirin_pcie_driver+0x8 (section: .data) -> kirin_pcie_remove (section: .exit.text)
(with ARCH=x86_64 W=1 allmodconfig).
Fixes: 000f60db784b ("PCI: kirin: Add support for a PHY layer")
Link: https://lore.kernel.org/r/20231001170254.2506508-3-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 8e37372ad0bea4c9b4712d9943f6ae96cff9491f upstream.
aspm_attr_store_common(), which handles sysfs control of ASPM, has the same
problem as fb097dcd5a28 ("PCI/ASPM: Disable only ASPM_STATE_L1 when driver
disables L1"): disabling L1 adds only ASPM_L1 (but not any of the L1.x
substates) to the "aspm_disable" mask.
Enabling one substate, e.g., L1.1, via sysfs removes ASPM_L1 from the
disable mask. Since disabling L1 via sysfs doesn't add any of the
substates to the disable mask, enabling L1.1 actually enables *all* the
substates.
In this scenario:
- Write 0 to "l1_aspm" to disable L1
- Write 1 to "l1_1_aspm" to enable L1.1
the intention is to disable L1 and all L1.x substates, then enable just
L1.1, but in fact, *all* L1.x substates are enabled.
Fix this by explicitly disabling all the L1.x substates when disabling L1.
Fixes: 72ea91afbfb0 ("PCI/ASPM: Add sysfs attributes for controlling ASPM link states")
Link: https://lore.kernel.org/r/6ba7dd79-9cfe-4ed0-a002-d99cb842f361@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit a07d2497ed657eb2efeb967af47e22f573dcd1d6 upstream.
The DWC core driver exposes the write_dbi2() callback for writing to the
DBI2 registers in a vendor-specific way.
On the Qcom EP platforms, the DBI_CS2 bit in the ELBI region needs to be
asserted before writing to any DBI2 registers and deasserted once done.
So, let's implement the callback for the Qcom PCIe EP driver so that the
DBI2 writes are correctly handled in the hardware.
Without this callback, the DBI2 register writes like BAR size won't go
through and as a result, the default BAR size is set for all BARs.
[kwilczynski: commit log, renamed function to match the DWC convention]
Fixes: f55fee56a631 ("PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver")
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/linux-pci/20231025130029.74693-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Cc: stable@vger.kernel.org # 5.16+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 7994db905c0fd692cf04c527585f08a91b560144 upstream.
The __init annotation makes the ks_pcie_probe() function disappear after
booting completes. However a device can also be bound later. In that case,
we try to call ks_pcie_probe(), but the backing memory is likely already
overwritten.
The right thing to do is do always have the probe callback available. Note
that the (wrong) __refdata annotation prevented this issue to be noticed by
modpost.
Fixes: 0c4ffcfe1fbc ("PCI: keystone: Add TI Keystone PCIe driver")
Link: https://lore.kernel.org/r/20231001170254.2506508-5-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 200bddbb3f5202bbce96444fdc416305de14f547 upstream.
With CONFIG_PCIE_KEYSTONE=y and ks_pcie_remove() marked with __exit, the
function is discarded from the driver. In this case a bound device can
still get unbound, e.g via sysfs. Then no cleanup code is run resulting in
resource leaks or worse.
The right thing to do is do always have the remove callback available.
Note that this driver cannot be compiled as a module, so ks_pcie_remove()
was always discarded before this change and modpost couldn't warn about
this issue. Furthermore the __ref annotation also prevents a warning.
Fixes: 0c4ffcfe1fbc ("PCI: keystone: Add TI Keystone PCIe driver")
Link: https://lore.kernel.org/r/20231001170254.2506508-4-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit 70b70a4307cccebe91388337b1c85735ce4de6ff upstream.
struct pci_dev contains two flags which govern whether the device may
suspend to D3cold:
* no_d3cold provides an opt-out for drivers (e.g. if a device is known
to not wake from D3cold)
* d3cold_allowed provides an opt-out for user space (default is true,
user space may set to false)
Since commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend"),
the user space setting overwrites the driver setting. Essentially user
space is trusted to know better than the driver whether D3cold is
working.
That feels unsafe and wrong. Assume that the change was introduced
inadvertently and do not overwrite no_d3cold when d3cold_allowed is
modified. Instead, consider d3cold_allowed in addition to no_d3cold
when choosing a suspend state for the device.
That way, user space may opt out of D3cold if the driver hasn't, but it
may no longer force an opt in if the driver has opted out.
Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
Link: https://lore.kernel.org/r/b8a7f4af2b73f6b506ad8ddee59d747cbf834606.1695025365.git.lukas@wunner.de
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Cc: stable@vger.kernel.org # v4.8+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit 04e82fa5951ca66495d7b05665eff673aa3852b4 ]
Use FIELD_GET() to remove dependences on the field position, i.e., the
shift value. No functional change intended.
Separate because this isn't as trivial as the other FIELD_GET() changes.
See 907830b0fc9e ("PCI: Add a REBAR size quirk for Sapphire RX 5600 XT
Pulse")
Link: https://lore.kernel.org/r/20231010204436.1000644-3-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Cc: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 89db0793c9f2da265ecb6c1681f899d9af157f37 ]
Update dw_pcie_link_set_max_link_width() to set PCI_EXP_LNKCAP_MLW.
In accordance with the DW PCIe RC/EP HW manuals [1,2,3,...] aside with
the PORT_LINK_CTRL_OFF.LINK_CAPABLE and GEN2_CTRL_OFF.NUM_OF_LANES[8:0]
field there is another one which needs to be updated.
It's LINK_CAPABILITIES_REG.PCIE_CAP_MAX_LINK_WIDTH. If it isn't done at
the very least the maximum link-width capability CSR won't expose the
actual maximum capability.
[1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
Version 4.60a, March 2015, p.1032
[2] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
Version 4.70a, March 2016, p.1065
[3] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
Version 4.90a, March 2016, p.1057
...
[X] DesignWare Cores PCI Express Controller Databook - DWC PCIe Endpoint,
Version 5.40a, March 2019, p.1396
[X+1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port,
Version 5.40a, March 2019, p.1266
Suggested-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-4-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit a9a1bcba90254975d4adbcca53f720318cf81c0c ]
This is a preparation before adding the Max-Link-width capability
setup which would in its turn complete the max-link-width setup
procedure defined by Synopsys in the HW-manual.
Seeing there is a max-link-speed setup method defined in the DW PCIe
core driver it would be good to have a similar function for the link
width setup.
That's why we need to define a dedicated function first from already
implemented but incomplete link-width setting up code.
Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit a18615b1cfc04f00548c60eb9a77e0ce56e848fd ]
Due to a hardware issue in A and B steppings of Intel IPU E2000, it expects
wrong endianness in ATS invalidation message body. This problem can lead to
outdated translations being returned as valid and finally cause system
instability.
To prevent such issues, add quirk_intel_e2000_no_ats() to disable ATS for
vulnerable IPU E2000 devices.
Link: https://lore.kernel.org/r/20230908143606.685930-3-bartosz.pawlowski@intel.com
Signed-off-by: Bartosz Pawlowski <bartosz.pawlowski@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit f18b1137d38c091cc8c16365219f0a1d4a30b3d1 ]
Introduce quirk_no_ats() helper function to provide a standard way to
disable ATS capability in PCI quirks.
Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230908143606.685930-2-bartosz.pawlowski@intel.com
Signed-off-by: Bartosz Pawlowski <bartosz.pawlowski@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit d1f9b39da4a5347150246871325190018cda8cb3 ]
Use FIELD_GET() to extract PCIe Negotiated and Maximum Link Width fields
instead of custom masking and shifting.
Link: https://lore.kernel.org/r/20230919125648.1920-7-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: drop duplicate include of <linux/bitfield.h>]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit d15f18053e5cc5576af9e7eef0b2a91169b6326d ]
Placing PCI error code check inside "if" condition usually results in need
to split lines. Combined with additional conditions the "if" condition
becomes messy.
Convert to the usual error handling pattern with an additional variable to
improve code readability. In addition, reverse the logic in
pci_find_vsec_capability() to get rid of &&.
No functional changes intended.
Link: https://lore.kernel.org/r/20230911125354.25501-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
[bhelgaas: PCI_POSSIBLE_ERROR()]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 408599ec561ad5862cda4f107626009f6fa97a74 ]
mvebu_pcie_setup_hw() setups the Maximum Link Width field in the Link
Capabilities registers using an open-coded variant of FIELD_PREP() with
a literal in shift. Improve readability by using
FIELD_PREP(PCI_EXP_LNKCAP_MLW, ...).
Link: https://lore.kernel.org/r/20230919125648.1920-6-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 759574abd78e3b47ec45bbd31a64e8832cf73f97 ]
Use FIELD_GET() to extract PCIe Negotiated Link Width field instead of
custom masking and shifting.
Similarly, change custom code that misleadingly used
PCI_EXP_LNKSTA_NLW_SHIFT to prepare value for PCI_EXP_LNKCAP write
to use FIELD_PREP() with correct field define (PCI_EXP_LNKCAP_MLW).
Link: https://lore.kernel.org/r/20230919125648.1920-5-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit e2abc47a5a1a9f641e7cacdca643fdd40729bf6e ]
ghes_handle_aer() passes AER data to the PCI core for logging and
recovery by calling aer_recover_queue() with a pointer to struct
aer_capability_regs.
The problem was that aer_recover_queue() queues the pointer directly
without copying the aer_capability_regs data. The pointer was to
the ghes->estatus buffer, which could be reused before
aer_recover_work_func() reads the data.
To avoid this problem, allocate a new aer_capability_regs structure
from the ghes_estatus_pool, copy the AER data from the ghes->estatus
buffer into it, pass a pointer to the new struct to
aer_recover_queue(), and free it after aer_recover_work_func() has
processed it.
Reported-by: Bjorn Helgaas <helgaas@kernel.org>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
[ rjw: Subject edits ]
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
commit 3cb4f534bac010258b2688395c2f13459a932be9 upstream.
This reverts commit fb097dcd5a28c0a2325632405c76a66777a6bed9.
After fb097dcd5a28 ("PCI/ASPM: Disable only ASPM_STATE_L1 when driver
disables L1"), disabling L1 via pci_disable_link_state(PCIE_LINK_STATE_L1),
then enabling one substate, e.g., L1.1, via sysfs actually enables *all*
the substates.
For example, r8169 disables L1 because of hardware issues on a number of
systems, which implicitly disables the L1.1 and L1.2 substates.
On some systems, L1 and L1.1 work fine, but L1.2 causes missed rx packets.
Enabling L1.1 via the sysfs "aspm_l1_1" attribute unexpectedly enables L1.2
as well as L1.1.
After fb097dcd5a28, pci_disable_link_state(PCIE_LINK_STATE_L1) adds only
ASPM_L1 (but not any of the L1.x substates) to the "aspm_disable" mask:
--- Before fb097dcd5a28
+++ After fb097dcd5a28
# r8169 disables L1:
pci_disable_link_state(PCIE_LINK_STATE_L1)
- disable |= ASPM_L1 | ASPM_L1_1 | ASPM_L1_2 | ... # disable L1, L1.x
+ disable |= ASPM_L1 # disable L1 only
# write "1" to sysfs "aspm_l1_1" attribute:
l1_1_aspm
aspm_attr_store_common(state = ASPM_L1_1)
disable &= ~ASPM_L1_1 # enable L1.1
if (state & (ASPM_L1_1 | ...)) # if enabling any substate
disable &= ~ASPM_L1 # enable L1
# final state:
- disable = ASPM_L1_2 | ... # L1, L1.1 enabled; L1.2 disabled
+ disable = 0 # L1, L1.1, L1.2 all enabled
Enabling an L1.x substate removes the substate and L1 from the
"aspm_disable" mask. After fb097dcd5a28, the substates were not added to
the mask when disabling L1, so enabling one substate implicitly enables all
of them.
Revert fb097dcd5a28 so enabling one substate doesn't enable the others.
Link: https://lore.kernel.org/r/c75931ac-7208-4200-9ca1-821629cf5e28@gmail.com
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
[bhelgaas: work through example in commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Upstream commit c9501d268944d6c0475ecb3e740a084a7da9cbfe ]
The pci_epc_release() function frees "epc" so the kfree() on the next line
is a double free. Drop the redundant free.
Fixes: 7711cbb4862a ("PCI: endpoint: Fix WARN() when an endpoint driver is removed")
Link: https://lore.kernel.org/r/2ce68694-87a7-4c06-b8a4-9870c891b580@moroto.mountain
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
[ Upstream commit 5827e17d0555b566c32044b0632b46f9f95054fa ]
vmd_domain_reset() attempts to find whether the device may contain multiple
functions by checking 0x80 (Multi-Function Device), however, the hdr_type
variable has already been masked with PCI_HEADER_TYPE_MASK so the check can
never true.
To fix the issue, don't mask the read with PCI_HEADER_TYPE_MASK.
Fixes: 6aab5622296b ("PCI: vmd: Clean up domain before enumeration")
Link: https://lore.kernel.org/r/20231003125300.5541-2-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Nirmal Patel <nirmal.patel@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
commit 7e6f3b6d2c352b5fde37ce3fed83bdf6172eebd4 upstream.
The AMD VanGogh SoC contains a DesignWare USB3 Dual-Role Device that can be
operated as either a USB Host or a USB Device, similar to on the AMD Nolan
platform.
be6646bfbaec ("PCI: Prevent xHCI driver from claiming AMD Nolan USB3 DRD
device") added a quirk to let the dwc3 driver claim the Nolan device since
it provides more specific support.
Extend that quirk to include the VanGogh SoC USB3 device.
Link: https://lore.kernel.org/r/20230927202212.2388216-1-vi@endrift.com
Signed-off-by: Vicki Pfau <vi@endrift.com>
[bhelgaas: include be6646bfbaec reference, add stable tag]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: stable@vger.kernel.org # v3.19+
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmUgHWsUHGJoZWxnYWFz
QGdvb2dsZS5jb20ACgkQWYigwDrT+vxMJg//T5TAOGAChU8YoPoUMsVeRYNOqkG9
G+rWydRr/Mj7dWg0zdi5L7fi/krFx+BdSpaq4DnVu6YgGboLnlP+Z4/gqXeFfO+j
lPP5OG3uOOLkw7aktYCRFdSkryrzm02eQDfiT/boL9hqF1ioyoWHgk4E7AITYgkH
/ZHL/R6OllwuLfqI9MAFZ/9aKkTtezSqTGOMnOZSUu/OykP26hJhCmq4SlmZoVwV
lc6DdxCzACfgnX1dOiaia42PaDbU0niwtiQw56bksk1oebEULbr/OuKRRm5zjfTE
5aLXJbrM5W8KOnO6sTuDy2FDb/BlFi3dC+TF1FrAEqnnuY3nHDSpNSiAmu3JU4qA
pHMLRoVWcewoDlI4cqeTg2eh8n82pnfkl8UOtgi0KzmCnaZzoZzr3aYQ9etK7XcK
CGFmGaoQ9zXXH60VCiRqSTcr11PoVulIbn+Aa6s3uw5KQxvDArPLuMl1ljngCinR
U127D77u//BqjRVdB9mY69JCXyp9LCwBJ/tN20Jj1yeDfX43OgB0oSy7A7eYQwoZ
oydgSaSE0bRSEl6lRmmQsNhz3Qcwe/l+x+LNEpU2IBMkUD4SuW5L2zjZAmzHtM/6
9mUBLUh9JhxTk+2/7q0DL4UiMmx2AKkdt5vCNdDeFmKF+MYg7YYEfORRJYlSTDcO
Ay6aBBcoV4KXGnk=
=6O20
-----END PGP SIGNATURE-----
Merge tag 'pci-v6.6-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
Pull PCI fixes from Bjorn Helgaas:
- Fix a qcom register offset that broke IPQ8074 PCIe controller
enumeration (Sricharan Ramabadhran)
- Handle interrupt parsing failures when creating a device tree node to
avoid using uninitialized data (Lizhi Hou)
- Clean up if adding PCI device node fails when creating a device tree
node to avoid a memory leak (Lizhi Hou)
- If a link is down, mark all downstream devices as "disconnected" so
we don't wait for them on resume (Mika Westerberg)
* tag 'pci-v6.6-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
PCI/PM: Mark devices disconnected if upstream PCIe link is down on resume
PCI: of: Destroy changeset when adding PCI device node fails
PCI: of_property: Handle interrupt parsing failures
PCI: qcom: Fix IPQ8074 enumeration
Mark Blakeney reported that when suspending system with a Thunderbolt
dock connected and then unplugging the dock before resume (which is
pretty normal flow with laptops), resuming takes long time.
What happens is that the PCIe link from the root port to the PCIe switch
inside the Thunderbolt device does not train (as expected, the link is
unplugged):
pcieport 0000:00:07.2: restoring config space at offset 0x24 (was 0x3bf12001, writing 0x3bf12001)
pcieport 0000:00:07.0: waiting 100 ms for downstream link
pcieport 0000:01:00.0: not ready 1023ms after resume; giving up
However, at this point we still try to resume the devices below that
unplugged link:
pcieport 0000:01:00.0: Unable to change power state from D3cold to D0, device inaccessible
...
pcieport 0000:01:00.0: restoring config space at offset 0x38 (was 0xffffffff, writing 0x0)
...
pcieport 0000:02:02.0: waiting 100 ms for downstream link, after activation
And this is the link from PCIe switch downstream port to the xHCI on the
dock:
xhci_hcd 0000:03:00.0: not ready 65535ms after resume; giving up
xhci_hcd 0000:03:00.0: Unable to change power state from D3cold to D0, device inaccessible
xhci_hcd 0000:03:00.0: restoring config space at offset 0x3c (was 0xffffffff, writing 0x1ff)
This ends up slowing down the resume time considerably. For this reason
mark these devices as disconnected if the link above them did not train
properly.
Fixes: e8b908146d44 ("PCI/PM: Increase wait time after resume")
Link: https://lore.kernel.org/r/20230918053041.1018876-1-mika.westerberg@linux.intel.com
Reported-by: Mark Blakeney <mark.blakeney@bullet-systems.net>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217915
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lukas Wunner <lukas@wunner.de>
Cc: stable@vger.kernel.org # v6.4+
Previously of_pci_make_dev_node() leaked a cset if it failed to create a
device node for the PCI device with of_changeset_create_node().
Destroy the cset if of_changeset_create_node() fails.
Fixes: 407d1a51921e ("PCI: Create device tree node for bridge")
Link: https://lore.kernel.org/r/1696007417-42059-1-git-send-email-lizhi.hou@amd.com
Reported-by: Herve Codina <herve.codina@bootlin.com>
Closes: https://lore.kernel.org/all/20230911171319.495bb837@bootlin.com/
Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
of_pci_prop_intr_map() uses uninitialized addr_sz[] values if
of_irq_parse_raw() fails, which leads to intermittent crashes.
Clear addr_sz[] before use so we never use uninitialized elements.
If no valid IRQs are parsed, don't bother adding the interrupt-map
property.
Fixes: 407d1a51921e ("PCI: Create device tree node for bridge")
Link: https://lore.kernel.org/r/1696007448-42127-1-git-send-email-lizhi.hou@amd.com
Reported-by: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Closes: https://lore.kernel.org/all/20230911154856.000076c3@Huawei.com/
Reported-by: Herve Codina <herve.codina@bootlin.com>
Closes: https://lore.kernel.org/all/20230911171319.495bb837@bootlin.com/
Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
[bhelgaas: commit log, add similar report from Herve]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
PARF_SLV_ADDR_SPACE_SIZE_2_3_3 is used by qcom_pcie_post_init_2_3_3().
This PCIe slave address space size register offset is 0x358 but was
incorrectly changed to 0x16c by 39171b33f652 ("PCI: qcom: Remove PCIE20_
prefix from register definitions").
This prevented access to slave address space registers like iATU, etc.,
so the IPQ8074 PCIe controller was not enumerated.
Revert back to the correct 0x358 offset and remove the unused
PARF_SLV_ADDR_SPACE_SIZE_2_3_3.
Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions")
Link: https://lore.kernel.org/r/20230919102948.1844909-1-quic_srichara@quicinc.com
Tested-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: stable@vger.kernel.org # v6.4+
Export and move the declaration of pcie_aer_is_native() to a common header
file to be reused by cxl/pci module.
Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Robert Richter <rrichter@amd.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/20230823234305.27333-3-Smita.KoralahalliChannabasappa@amd.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
-----BEGIN PGP SIGNATURE-----
iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmT8goMUHGJoZWxnYWFz
QGdvb2dsZS5jb20ACgkQWYigwDrT+vz2jxAAraKdqDFC7ARsslpG2KI4sUad/2S6
eMgEE4ud/yJzs8NbMKH0QZvnBo+TbTGoxakersX9MBU+FNSofll7BTdfURwV8pmx
BhAycP9kFBljBFQAYEpxJ2pBIEqReq+58Fs9oHHgMg5WcJ9VvRecFnP6stXhH8Jd
taFQ2vlYDMDFnF++nSIK9wvZzN7Ku+fng9ChdI2OZFqx8EX6XaDE3c/1LZP2vms7
SoaC8ZxI+66u1oo51XZz0QPWLVrKxaVRACtn02HbiQ7YLpfOK0zyPXUMwTpcOgng
urwcd/pDZoOF8DPjhPd6UwJKGs15swupzNiyQKNSnReff8DpzA+SWVe3ntIX/NF4
AVscmLa/XntiiXHgeXtWXc6Ve7255eOQruy3tt0A5bmWGDWY1Ik+hpPC1yevZfYU
0DMrVZPNntSEmEKml4iPQptvEGAVcYFN0VCemcEunqcDFyUaCh7SkIoKL80rf/h8
bIbDHOGYYYmGH9AwOYgUcmwAYK154z99EvO45ptiXuC05wfw5X3JedO8S2YsK7Yx
6ZCzs/ZpvPpTxnvoDw59qVcZ1T6PR8BoExEYKUXuBfgYVivoGHHh/BNaRsKqc1F4
+FA/Yn2JrUoANNm1uyJv+z0zteXzOH/hIPxnPajH8Ojh2lCdniOBi8+SZgk7PUss
k4CDTrVHH1eO73M=
=MzOj
-----END PGP SIGNATURE-----
Merge tag 'pci-v6.6-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
Pull PCI fixes from Bjorn Helgaas:
- Add PCI_DYNAMIC_OF_NODES dependency on OF_IRQ to fix sparc64 build
error (Lizhi Hou)
- After coalescing host bridge resources, free any released resources
to avoid a leak (Ross Lagerwall)
- Revert a quirk that prevented NVIDIA T4 GPUs from using Secondary Bus
Reset. The quirk worked around an issue that we now think is related
to the Root Port, not the GPU (Bjorn Helgaas)
* tag 'pci-v6.6-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
Revert "PCI: Mark NVIDIA T4 GPUs to avoid bus reset"
PCI: Free released resource after coalescing
PCI: Fix CONFIG_PCI_DYNAMIC_OF_NODES kconfig dependencies
This reverts commit d5af729dc2071273f14cbb94abbc60608142fd83.
d5af729dc207 ("PCI: Mark NVIDIA T4 GPUs to avoid bus reset") avoided
Secondary Bus Reset on the T4 because the reset seemed to not work when the
T4 was directly attached to a Root Port.
But NVIDIA thinks the issue is probably related to some issue with the Root
Port, not with the T4. The T4 provides neither PM nor FLR reset, so
masking bus reset compromises this device for assignment scenarios.
Revert d5af729dc207 as requested by Wu Zongyong. This will leave SBR
broken in the specific configuration Wu tested, as it was in v6.5, so Wu
will debug that further.
Link: https://lore.kernel.org/r/ZPqMCDWvITlOLHgJ@wuzongyong-alibaba
Link: https://lore.kernel.org/r/20230908201104.GA305023@bhelgaas
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
- Add HOTPLUG_SMT support (/sys/devices/system/cpu/smt) and honour the
configured SMT state when hotplugging CPUs into the system.
- Combine final TLB flush and lazy TLB mm shootdown IPIs when using the Radix
MMU to avoid a broadcast TLBIE flush on exit.
- Drop the exclusion between ptrace/perf watchpoints, and drop the now unused
associated arch hooks.
- Add support for the "nohlt" command line option to disable CPU idle.
- Add support for -fpatchable-function-entry for ftrace, with GCC >= 13.1.
- Rework memory block size determination, and support 256MB size on systems
with GPUs that have hotpluggable memory.
- Various other small features and fixes.
Thanks to: Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Athira Rajeev,
Benjamin Gray, Christophe Leroy, Frederic Barrat, Gautam Menghani, Geoff Levand,
Hari Bathini, Immad Mir, Jialin Zhang, Joel Stanley, Jordan Niethe, Justin
Stitt, Kajol Jain, Kees Cook, Krzysztof Kozlowski, Laurent Dufour, Liang He,
Linus Walleij, Mahesh Salgaonkar, Masahiro Yamada, Michal Suchanek, Nageswara
R Sastry, Nathan Chancellor, Nathan Lynch, Naveen N Rao, Nicholas Piggin, Nick
Desaulniers, Omar Sandoval, Randy Dunlap, Reza Arbab, Rob Herring, Russell
Currey, Sourabh Jain, Thomas Gleixner, Trevor Woerner, Uwe Kleine-König, Vaibhav
Jain, Xiongfeng Wang, Yuan Tan, Zhang Rui, Zheng Zengkai.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAmTwgbwTHG1wZUBlbGxl
cm1hbi5pZC5hdQAKCRBR6+o8yOGlgFmpD/432vipeoqvkAYsyK0xi/Y3GcY0wcyd
WJApLXXadEbtKQrgXQ6sowWqalg5thYnQCRarg/tXKK/po3KfgwkPjGDpOL+cIdr
12QVN2XJm9VmJ1wYJxzk+yXx4F43AdmMdr94qWAGufbTHezwb4UpzVR1NxtFrOE/
X5TNsC2+2mdZY/ZaNHS5vsTIFv3EhQfqgjZPlIAdLn6CGc8xWT514Q/uHA8+ytM/
HL7Hqs33DoPSvgTa5TT/2E0d0k5nO3P5KObzAjpYlireTPaBi51mpKGewcrtm0o2
v3cBlbfx3C7pe9ZhKBK9BH8cjynfiqsVZ9/lCw/7eBNdm9tHuzG0jeS7Db9tCZXS
fM7G2R7SoIusPTqxlBmkU5DpYslwrHiVgCyy3ijxkoA/fakVwh/GgTcMsRt73IY6
n6DsUvWwuYHCIeIiHmHQJqCqCRtV+aMzU3AbbBHOjtdIanhlW16M686dEsgCirh7
akRVRD5VqKaqXs34PpkRL89Xv3wZRjl6XZ3hZFfCjSYXfpXDXhgSToIskpHYhKL8
gpY7WtG9YQP05Xz5HRCx6EluaZVeKe0lZi6fezX7Mi9AygJQO8FfXqP1mHBlEq40
ThWtvL9D89RV6lADqqFN20XepgvKNOyAXcE4szvsnIZYUSPmZQZSPxx+DHtROaLP
jX3ifxtxJp92pQ==
=5g7K
-----END PGP SIGNATURE-----
Merge tag 'powerpc-6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
- Add HOTPLUG_SMT support (/sys/devices/system/cpu/smt) and honour the
configured SMT state when hotplugging CPUs into the system
- Combine final TLB flush and lazy TLB mm shootdown IPIs when using the
Radix MMU to avoid a broadcast TLBIE flush on exit
- Drop the exclusion between ptrace/perf watchpoints, and drop the now
unused associated arch hooks
- Add support for the "nohlt" command line option to disable CPU idle
- Add support for -fpatchable-function-entry for ftrace, with GCC >=
13.1
- Rework memory block size determination, and support 256MB size on
systems with GPUs that have hotpluggable memory
- Various other small features and fixes
Thanks to Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Athira
Rajeev, Benjamin Gray, Christophe Leroy, Frederic Barrat, Gautam
Menghani, Geoff Levand, Hari Bathini, Immad Mir, Jialin Zhang, Joel
Stanley, Jordan Niethe, Justin Stitt, Kajol Jain, Kees Cook, Krzysztof
Kozlowski, Laurent Dufour, Liang He, Linus Walleij, Mahesh Salgaonkar,
Masahiro Yamada, Michal Suchanek, Nageswara R Sastry, Nathan Chancellor,
Nathan Lynch, Naveen N Rao, Nicholas Piggin, Nick Desaulniers, Omar
Sandoval, Randy Dunlap, Reza Arbab, Rob Herring, Russell Currey, Sourabh
Jain, Thomas Gleixner, Trevor Woerner, Uwe Kleine-König, Vaibhav Jain,
Xiongfeng Wang, Yuan Tan, Zhang Rui, and Zheng Zengkai.
* tag 'powerpc-6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (135 commits)
macintosh/ams: linux/platform_device.h is needed
powerpc/xmon: Reapply "Relax frame size for clang"
powerpc/mm/book3s64: Use 256M as the upper limit with coherent device memory attached
powerpc/mm/book3s64: Fix build error with SPARSEMEM disabled
powerpc/iommu: Fix notifiers being shared by PCI and VIO buses
powerpc/mpc5xxx: Add missing fwnode_handle_put()
powerpc/config: Disable SLAB_DEBUG_ON in skiroot
powerpc/pseries: Remove unused hcall tracing instruction
powerpc/pseries: Fix hcall tracepoints with JUMP_LABEL=n
powerpc: dts: add missing space before {
powerpc/eeh: Use pci_dev_id() to simplify the code
powerpc/64s: Move CPU -mtune options into Kconfig
powerpc/powermac: Fix unused function warning
powerpc/pseries: Rework lppaca_shared_proc() to avoid DEBUG_PREEMPT
powerpc: Don't include lppaca.h in paca.h
powerpc/pseries: Move hcall_vphn() prototype into vphn.h
powerpc/pseries: Move VPHN constants into vphn.h
cxl: Drop unused detach_spa()
powerpc: Drop zalloc_maybe_bootmem()
powerpc/powernv: Use struct opal_prd_msg in more places
...
-----BEGIN PGP SIGNATURE-----
iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmTvfQgUHGJoZWxnYWFz
QGdvb2dsZS5jb20ACgkQWYigwDrT+vyDKA//UBxniXTyxvN8L/agMZngFJd9jLkE
p2lnk5eTW6y/aJp1g+ujc7IJEmHG/B1Flp0b5mK8XL7S6OBtAGlPwnuPPpXb0ZxV
ofSuQpYoNZGpkYrQMYvATfdLnH2WF3Yj3WCqh5jd2EldPEyqhMV68l7NMzf6+td2
KWJPli1XO8e60JAzbhpXH9vn1I0T8e6Qx8z/ulcydfiOH3PGDPnVrEo8gw9CvJOr
aDqSPW7uhTk2SjjUJcAlQVpTGclE4yBxOOhEbuSGc7L6Ab04Y6D0XKx1589AUK6Z
W2dQFK3cFYNQQ9aS/2DMUG88H09ca5t8kgUf7Iz3uan1soPzSYK8SLNBgxAPs11S
1jY093rDXXoaCJqxWUwDc/JUpWq6T3g4m445SNvFIOMcSwmMOIfAwfug4UexE1zC
Ie8u3Um35Mp25o0o6V1J2EjdBsUsm0p//CsslfoAAIWi85W02Z/46bLLcITchkCe
bP05H+c55ZN6maRJiaeghcpY+iWO4XCRCKS9mF1v9yn7FOhNxhBcwgTNPyGBVrYz
T9w3ynTHAmuwNqtd6jhpTR/b1902up/Qv9I8uHhBDMqJAXfHocGEXHZblNuZMgfE
bu9cjcbFghUPdrhUHYmbEqAzhdlL2SFuMYfn8D4QV4A6x+32xCdwsi39I0Effm5V
wl0HmemjKjTYbLw=
=iFFM
-----END PGP SIGNATURE-----
Merge tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
Pull PCI updates from Bjorn Helgaas:
"Enumeration:
- Add locking to read/modify/write PCIe Capability Register accessors
for Link Control and Root Control
- Use pci_dev_id() when possible instead of manually composing ID
from dev->bus->number and dev->devfn
Resource management:
- Move prototypes for __weak sysfs resource files to linux/pci.h to
fix 'no previous prototype' warnings
- Make more I/O port accesses depend on HAS_IOPORT
- Use devm_platform_get_and_ioremap_resource() instead of open-coding
platform_get_resource() followed by devm_ioremap_resource()
Power management:
- Ensure devices are powered up while accessing VPD
- If device is powered-up, keep it that way while polling for PME
- Only read PCI_PM_CTRL register when available, to avoid reading the
wrong register and corrupting dev->current_state
Virtualization:
- Avoid Secondary Bus Reset on NVIDIA T4 GPUs
Error handling:
- Remove unused pci_disable_pcie_error_reporting()
- Unexport pci_enable_pcie_error_reporting(), used only by aer.c
- Unexport pcie_port_bus_type, used only by PCI core
VGA:
- Simplify and clean up typos in VGA arbiter
Apple PCIe controller driver:
- Initialize pcie->nvecs (number of available MSIs) before use
Broadcom iProc PCIe controller driver:
- Use of_property_read_bool() instead of low-level accessors for
boolean properties
Broadcom STB PCIe controller driver:
- Assert PERST# when probing BCM2711 because some bootloaders don't
do it
Freescale i.MX6 PCIe controller driver:
- Add .host_deinit() callback so we can clean up things like
regulators on probe failure or driver unload
Freescale Layerscape PCIe controller driver:
- Add support for link-down notification so the endpoint driver can
process LINK_DOWN events
- Add suspend/resume support, including manual
PME_Turn_off/PME_TO_Ack handshake
- Save Link Capabilities during probe so they can be restored when
handling a link-up event, since the controller loses the Link Width
and Link Speed values during reset
Intel VMD host bridge driver:
- Fix disable of bridge windows during domain reset; previously we
cleared the base/limit registers, which actually left the windows
enabled
Marvell MVEBU PCIe controller driver:
- Remove unused busn member
Microchip PolarFlare PCIe controller driver:
- Fix interrupt bit definitions so the SEC and DED interrupt handlers
work correctly
- Make driver buildable as a module
- Read FPGA MSI configuration parameters from hardware instead of
hard-coding them
Microsoft Hyper-V host bridge driver:
- To avoid a NULL pointer dereference, skip MSI restore after
hibernate if MSI/MSI-X hasn't been enabled
NVIDIA Tegra194 PCIe controller driver:
- Revert 'PCI: tegra194: Enable support for 256 Byte payload' because
Linux doesn't know how to reduce MPS from to 256 to 128 bytes for
endpoints below a switch (because other devices below the switch
might already be operating), which leads to 'Malformed TLP' errors
Qualcomm PCIe controller driver:
- Add DT and driver support for interconnect bandwidth voting for
'pcie-mem' and 'cpu-pcie' interconnects
- Fix broken SDX65 'compatible' DT property
- Configure controller so MHI bus master clock will be switched off
while in ASPM L1.x states
- Use alignment restriction from EPF core in EPF MHI driver
- Add Endpoint eDMA support
- Add MHI eDMA support
- Add Snapdragon SM8450 support to the EPF MHI driversupport
- Add MHI eDMA support
- Add Snapdragon SM8450 support to the EPF MHI driversupport
- Add MHI eDMA support
- Add Snapdragon SM8450 support to the EPF MHI driversupport
- Add MHI eDMA support
- Add Snapdragon SM8450 support to the EPF MHI driver
- Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup
latency
- Add sa8775p DT binding and driver support
Rockchip PCIe controller driver:
- Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the
upper 32 bits
SiFive FU740 PCIe controller driver:
- Set the supported number of MSI vectors so we can use all available
MSI interrupts
Synopsys DesignWare PCIe controller driver:
- Add generic dwc suspend/resume APIs (dw_pcie_suspend_noirq() and
dw_pcie_resume_noirq()) to be called by controller driver
suspend/resume ops, and a controller callback to send PME_Turn_Off
MicroSemi Switchtec management driver:
- Add support for PCIe Gen5 devices
Miscellaneous:
- Reorder and compress to reduce size of struct pci_dev
- Fix race in DOE destroy_work_on_stack()
- Add stubs to avoid casts between incompatible function types
- Explicitly include correct DT includes to untangle headers"
* tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (96 commits)
PCI: qcom-ep: Add ICC bandwidth voting support
dt-bindings: PCI: qcom: ep: Add interconnects path
PCI: qcom-ep: Treat unknown IRQ events as an error
dt-bindings: PCI: qcom: Fix SDX65 compatible
PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API
PCI: epf-mhi: Use iATU for small transfers
PCI: epf-mhi: Add support for SM8450
PCI: epf-mhi: Add eDMA support
PCI: qcom-ep: Add eDMA support
PCI: epf-mhi: Make use of the alignment restriction from EPF core
PCI/PM: Only read PCI_PM_CTRL register when available
PCI: qcom: Add support for sa8775p SoC
dt-bindings: PCI: qcom: Add sa8775p compatible
PCI: qcom-ep: Pass alignment restriction to the EPF core
PCI: Simplify pcie_capability_clear_and_set_word() control flow
PCI: Tidy config space save/restore messages
PCI: Fix code formatting inconsistencies
PCI: Fix typos in docs and comments
PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos
PCI: Simplify pci_dev_driver()
...
DT core:
- Add support for generating DT nodes for PCI devices. This is the
groundwork for applying overlays to PCI devices containing
non-discoverable downstream devices.
- DT unittest additions to check reverted changesets, to test for
refcount issues, and to test unresolved symbols. Also, various
clean-ups of the unittest along the way.
- Refactor node and property manipulation functions to better share code
with old API and changeset API
- Refactor changeset print functions to a common implementation
- Move some platform_device specific functions into of_platform.c
Bindings:
- Treewide fixing of typos
- Treewide clean-up of SPDX tags to use 'OR' consistently
- Last chunk of dropping unnecessary quotes. With that, the check
for unnecessary quotes is enabled in yamllint.
- Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
bindings to DT schema format
- Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450 Inline
Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt controller,
Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings
- Fixes for Rockchip DWC PCI binding
- Ensure all properties are evaluated on USB connector schema
- Fix dt-check-compatible script to find of_device_id instances with
compiler annotations
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAmTubyoACgkQ+vtdtY28
YcPamA//feXFYNPiIbSa7XqfAu1PE5XSg3PqCe77QvLBGJU7saTwRJApc88iTjlA
hc5EELnZKp3FE9N7DJdmvEjYxKDqtJOukO+txKy3mFBWo+gZQURthZVcbLxUZmpw
XmYA4b/GrIv5h8YWG1wokyaGTtSfTcf0+RmAtVepiDk5kWQKaC04Let356fKn9xi
ePgLTZV6BJvPoGpMWd08o+1szUAc6Vihs9qWu7g0+mtb5K5xi/l05YMz3REu7kpf
iz06CE/uzYvHpFBJZ6izN+9Qqxh52DnWckXX68v8kStHUON2h1YmZYvjhGrfay4k
rHeDnHoRBrepDDCytXQ/fxzGtURr3b8yBnlhzEQadMLXmf25mm+TRBDmf6GnX5ij
QmHlj+eSARIafcbb4fqF1Hdyv8c7XM0AkEnj1XrIWLtXPuRNSHlS25dngCztbII/
lqmtBaH1ifCKj2VQ8YL8sVX7k208YU9vDNKZHQyA8dPEYwhknrWmp1F0OAnBB+wz
F11kDE7xkZ0/gE7mUHwe9mP94hC6Ceks4IuBvsTzBmSwqXxyCz8gM2KHK4U3gNUr
Sk2hWgZn+k2HM9zLb38FE18C6hqws6RBUWnJwZ4V3qPo2eYJ8Jzkvm7oonxjHgCC
4FmYYAoCQhBEkZPOJ4map0eO5VbShn9Hrgs46Jj4WoXmm7dFDLc=
=kl+z
-----END PGP SIGNATURE-----
Merge tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Add support for generating DT nodes for PCI devices. This is the
groundwork for applying overlays to PCI devices containing
non-discoverable downstream devices.
- DT unittest additions to check reverted changesets, to test for
refcount issues, and to test unresolved symbols. Also, various
clean-ups of the unittest along the way.
- Refactor node and property manipulation functions to better share
code with old API and changeset API
- Refactor changeset print functions to a common implementation
- Move some platform_device specific functions into of_platform.c
Bindings:
- Treewide fixing of typos
- Treewide clean-up of SPDX tags to use 'OR' consistently
- Last chunk of dropping unnecessary quotes. With that, the check for
unnecessary quotes is enabled in yamllint.
- Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
bindings to DT schema format
- Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450
Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt
controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings
- Fixes for Rockchip DWC PCI binding
- Ensure all properties are evaluated on USB connector schema
- Fix dt-check-compatible script to find of_device_id instances with
compiler annotations"
* tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits)
dt-bindings: usb: Add V3s compatible string for OHCI
dt-bindings: usb: Add V3s compatible string for EHCI
dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B
dt-bindings: vendor-prefixes: document Saef Technology
dt-bindings: thermal: lmh: update maintainer address
of: unittest: Fix of_unittest_pci_node() kconfig dependencies
dt-bindings: crypto: ice: Document sm8450 inline crypto engine
dt-bindings: ufs: qcom: Add ICE to sm8450 example
dt-bindings: ufs: qcom: Add sm6115 binding
dt-bindings: ufs: qcom: Add reg-names property for ICE
dt-bindings: yamllint: Enable quoted string check
dt-bindings: Drop remaining unneeded quotes
of: unittest-data: Fix whitespace - angular brackets
of: unittest-data: Fix whitespace - indentation
of: unittest-data: Fix whitespace - blank lines
of: unittest-data: Convert remaining overlay DTS files to sugar syntax
of: overlay: unittest: Add test for unresolved symbol
of: unittest: Add separators to of_unittest_overlay_high_level()
of: unittest: Cleanup partially-applied overlays
of: unittest: Merge of_unittest_apply{,_revert}_overlay_check()
...
- allow dynamic sizing of the swiotlb buffer, to cater for secure
virtualization workloads that require all I/O to be bounce buffered
(Petr Tesarik)
- move a declaration to a header (Arnd Bergmann)
- check for memory region overlap in dma-contiguous (Binglei Wang)
- remove the somewhat dangerous runtime swiotlb-xen enablement and
unexport is_swiotlb_active (Christoph Hellwig, Juergen Gross)
- per-node CMA improvements (Yajun Deng)
-----BEGIN PGP SIGNATURE-----
iQI/BAABCgApFiEEgdbnc3r/njty3Iq9D55TZVIEUYMFAmTuDHkLHGhjaEBsc3Qu
ZGUACgkQD55TZVIEUYOqvhAApMk2/ceTgVH17sXaKE822+xKvgv377O6TlggMeGG
W4zA0KD69DNz0AfaaCc5U5f7n8Ld/YY1RsvkHW4b3jgw+KRTeQr0jjitBgP5kP2M
A1+qxdyJpCTwiPt9s2+JFVPeyZ0s52V6OJODKRG3s0ore55R+U09VySKtASON+q3
GMKfWqQteKC+thg7NkrQ7JUixuo84oICws+rZn4K9ifsX2O0HYW6aMW0feRfZjJH
r0TgqZc4RdPTSaF22oapR9Ls39+7hp/pBvoLm5sBNA3cl5C3X4VWo9ERMU1jW9h+
VYQv39NycUspgskWJmpbU06/+ooYqQlwHSR/vdNusmFIvxo4tf6/UX72YO5F8Dar
ap0wYGauiEwTjSnhVxPTXk3obWyWEsgFAeRnPdTlH2CNmv38QZU2HLb8eU1pcXxX
j+WI2Ewy9z22uBVYiPOKpdW1jkSfmlmfPp/8SbAdua7I3YQ90rQN6AvU06zAi/cL
NQTgO81E4jPkygqAVgS/LeYziWAQ73yM7m9ExThtTgqFtHortwhJ4Fd8XKtvtvEb
viXAZ/WZtQBv/CIKAW98NhgIDP/SPOT8ym6V35WK+kkNFMS6LMSQUfl9GgbHGyFa
n9icMm7BmbDtT1+AKNafG9En4DtAf9M9QNidAVOyfrsIk6S0gZoZwvIStkA7on8a
cNY=
=kVVr
-----END PGP SIGNATURE-----
Merge tag 'dma-mapping-6.6-2023-08-29' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-maping updates from Christoph Hellwig:
- allow dynamic sizing of the swiotlb buffer, to cater for secure
virtualization workloads that require all I/O to be bounce buffered
(Petr Tesarik)
- move a declaration to a header (Arnd Bergmann)
- check for memory region overlap in dma-contiguous (Binglei Wang)
- remove the somewhat dangerous runtime swiotlb-xen enablement and
unexport is_swiotlb_active (Christoph Hellwig, Juergen Gross)
- per-node CMA improvements (Yajun Deng)
* tag 'dma-mapping-6.6-2023-08-29' of git://git.infradead.org/users/hch/dma-mapping:
swiotlb: optimize get_max_slots()
swiotlb: move slot allocation explanation comment where it belongs
swiotlb: search the software IO TLB only if the device makes use of it
swiotlb: allocate a new memory pool when existing pools are full
swiotlb: determine potential physical address limit
swiotlb: if swiotlb is full, fall back to a transient memory pool
swiotlb: add a flag whether SWIOTLB is allowed to grow
swiotlb: separate memory pool data from other allocator data
swiotlb: add documentation and rename swiotlb_do_find_slots()
swiotlb: make io_tlb_default_mem local to swiotlb.c
swiotlb: bail out of swiotlb_init_late() if swiotlb is already allocated
dma-contiguous: check for memory region overlap
dma-contiguous: support numa CMA for specified node
dma-contiguous: support per-numa CMA for all architectures
dma-mapping: move arch_dma_set_mask() declaration to header
swiotlb: unexport is_swiotlb_active
x86: always initialize xen-swiotlb when xen-pcifront is enabling
xen/pci: add flag for PCI passthrough being possible
- Reorder struct pci_dev to avoid holes and reduce size (Christophe
JAILLET)
- Change pdev->rom_attr_enabled to single bit since it's only a boolean
value (Christophe JAILLET)
- Use struct_size() in pirq_convert_irt_table() instead of hand-writing it
(Christophe JAILLET)
- Explicitly include correct DT includes to untangle headers (Rob Herring)
- Fix a DOE race between destroy_work_on_stack() and the stack-allocated
task->work struct going out of scope in pci_doe() (Ira Weiny)
- Use pci_dev_id() when possible instead of manually composing ID from
dev->bus->number and dev->devfn (Xiongfeng Wang, Zheng Zengkai)
- Move pci_create_resource_files() declarations to linux/pci.h for alpha
build warnings (Arnd Bergmann)
- Remove unused hotplug function declarations (Yue Haibing)
- Remove unused mvebu struct mvebu_pcie.busn (Pali Rohár)
- Unexport pcie_port_bus_type (Bjorn Helgaas)
- Remove unnecessary sysfs ID local variable initialization (Bjorn Helgaas)
- Fix BAR value printk formatting to accommodate 32-bit values (Bjorn
Helgaas)
- Use consistent pointer types for config access syscall get_user() and
put_user() uses (Bjorn Helgaas)
- Simplify AER_RECOVER_RING_SIZE definition (Bjorn Helgaas)
- Simplify pci_pio_to_address() (Bjorn Helgaas)
- Simplify pci_dev_driver() (Bjorn Helgaas)
- Fix pci_bus_resetable(), pci_slot_resetable() name typos (Bjorn Helgaas)
- Fix code and doc typos and code formatting (Bjorn Helgaas)
- Tidy config space save/restore messages (Bjorn Helgaas)
* pci/misc:
PCI: Tidy config space save/restore messages
PCI: Fix code formatting inconsistencies
PCI: Fix typos in docs and comments
PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos
PCI: Simplify pci_dev_driver()
PCI: Simplify pci_pio_to_address()
PCI/AER: Simplify AER_RECOVER_RING_SIZE definition
PCI: Use consistent put_user() pointer types
PCI: Fix printk field formatting
PCI: Remove unnecessary initializations
PCI: Unexport pcie_port_bus_type
PCI: mvebu: Remove unused busn member
PCI: Remove unused function declarations
PCI/sysfs: Move declarations to linux/pci.h
PCI/P2PDMA: Use pci_dev_id() to simplify the code
PCI/IOV: Use pci_dev_id() to simplify the code
PCI/AER: Use pci_dev_id() to simplify the code
PCI: apple: Use pci_dev_id() to simplify the code
PCI/DOE: Fix destroy_work_on_stack() race
PCI: Explicitly include correct DT includes
x86/PCI: Use struct_size() in pirq_convert_irt_table()
PCI: Change pdev->rom_attr_enabled to single bit
PCI: Reorder pci_dev fields to reduce holes
- Add support for Switechtec PCIe Gen5 devices (Kelvin Cao)
* pci/controller/switchtec:
PCI: switchtec: Add support for PCIe Gen5 devices
PCI: switchtec: Use normal comment style
- Use Use devm_platform_get_and_ioremap_resource() instead of open-coding
platform_get_resource() followed by devm_ioremap_resource() (Yang Li)
* pci/controller/resources:
PCI: imx6: Use devm_platform_get_and_ioremap_resource()
PCI: xgene-msi: Use devm_platform_get_and_ioremap_resource()
PCI: v3: Use devm_platform_get_and_ioremap_resource()
PCI: rcar-gen2: Use devm_platform_get_and_ioremap_resource()
- Add stubs for devm action functions that call clk_disable_unprepare() to
avoid casts between incompatible function types (Krzysztof Wilczyński)
* pci/controller/remove-void-cast:
PCI: microchip: Remove cast between incompatible function type
PCI: keembay: Remove cast between incompatible function type
PCI: meson: Remove cast between incompatible function type
- Fix disable of bridge windows during domain reset; previously we cleared
the base/limit registers, which left the windows enabled (Nirmal Patel)
* pci/controller/vmd:
PCI: vmd: Disable bridge window for domain reset
- Revert "PCI: tegra194: Enable support for 256 Byte payload" because Linux
doesn't know how to reduce MPS from to 256 to 128 bytes for Endpoints
below a Switch (because other devices below the Switch might already be
operating), which leads to Malformed TLP errors (Vidya Sagar)
* pci/controller/tegra194:
Revert "PCI: tegra194: Enable support for 256 Byte payload"
- Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the upper
32 bits (Rick Wertenbroek)
* pci/controller/rockchip:
PCI: rockchip: Use 64-bit mask on MSI 64-bit PCI address
- Pass the Qcom Endpoint 4K alignment requirement for outbound windows to
the EPF core so EPF drivers can use it (Manivannan Sadhasivam)
- Use alignment restriction from EPF core in Qcom EPF MHI driver
(Manivannan Sadhasivam)
- Add Qcom Endpoint eDMA support by enabling the eDMA IRQ (Manivannan
Sadhasivam)
- Add Qcom MHI eDMA support (Manivannan Sadhasivam)
- Add Qcom Snapdragon SM8450 support to the EPF MHI driver (Manivannan
Sadhasivam)
- Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup
latency (Manivannan Sadhasivam)
- Add pci_epc_mem_init() kernel-doc (Manivannan Sadhasivam)
* pci/controller/qcom-edma:
PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API
PCI: epf-mhi: Use iATU for small transfers
PCI: epf-mhi: Add support for SM8450
PCI: epf-mhi: Add eDMA support
PCI: qcom-ep: Add eDMA support
PCI: epf-mhi: Make use of the alignment restriction from EPF core
PCI: qcom-ep: Pass alignment restriction to the EPF core
- Configure controller so MHI bus master clock will be switched off while
in ASPM L1.x states (Manivannan Sadhasivam)
- Add sa8775p DT binding and driver support (Mrinmay Sarkar)
- Fix broken DT SDX65 "compatible" property (Krzysztof Kozlowski)
* pci/controller/qcom:
dt-bindings: PCI: qcom: Fix SDX65 compatible
PCI: qcom: Add support for sa8775p SoC
dt-bindings: PCI: qcom: Add sa8775p compatible
PCI: qcom-ep: Switch MHI bus master clock off during L1SS
- Fix DED and SEC interrupt bit offsets so interrupt handlers work
correctly (Daire McNamara)
- Make driver buildable as a module (Daire McNamara)
- Reorganize register #defines to align with hardware docs (Daire McNamara)
- Tweak register accessors to simplify callers (Daire McNamara)
- Refactor interrupt initialisation (Daire McNamara)
- Read FPGA MSI configuration parameters from hardware instead of
hard-coding them (Daire McNamara)
- Re-partition code between probe() and init() (Daire McNamara)
* pci/controller/microchip:
PCI: microchip: Re-partition code between probe() and init()
PCI: microchip: Gather MSI information from hardware config registers
PCI: microchip: Clean up initialisation of interrupts
PCI: microchip: Enable event handlers to access bridge and control pointers
PCI: microchip: Align register, offset, and mask names with HW docs
PCI: microchip: Enable building driver as a module
PCI: microchip: Correct the DED and SEC interrupt bit offsets
- Add support for link-down notification so the endpoint driver can process
LINK_DOWN events (Frank Li)
- Save Link Capabilities during probe so they can be restored when handling
a link-up event, since the controller loses the Link Width and Link Speed
values during reset (Xiaowei Bao)
* pci/controller/layerscape:
PCI: layerscape: Add workaround for lost link capabilities during reset
PCI: layerscape: Add support for link-down notification
- Use of_property_read_bool() instead of low-level accessors for boolean
properties (Rob Herring)
* pci/controller/iproc:
PCI: iproc: Use of_property_read_bool() for boolean properties
- To avoid a NULL pointer dereference, skip MSI restore after hibernate if
MSI/MSI-X hasn't been enabled (Dexuan Cui)
* pci/controller/hv:
PCI: hv: Fix a crash in hv_pci_restore_msi_msg() during hibernation
