linux/arch/x86/events
Kan Liang 1d5c788099 perf/x86/intel: Fix instructions:ppp support in Sapphire Rapids
Perf errors out when sampling instructions:ppp.

$ perf record -e instructions:ppp -- true
Error:
The sys_perf_event_open() syscall returned with 22 (Invalid argument)
for event (instructions:ppp).

The instruction PDIR is only available on the fixed counter 0. The event
constraint has been updated to fixed0_constraint in
icl_get_event_constraints(). The Sapphire Rapids codes unconditionally
error out for the event which is not available on the GP counter 0.

Make the instructions:ppp an exception.

Fixes: 61b985e3e7 ("perf/x86/intel: Add perf core PMU support for Sapphire Rapids")
Reported-by: Yasin, Ahmad <ahmad.yasin@intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1624029174-122219-4-git-send-email-kan.liang@linux.intel.com
2021-06-23 18:30:55 +02:00
..
amd Handle power-gating of AMD IOMMU perf counters properly when they are used. 2021-05-09 13:00:26 -07:00
intel perf/x86/intel: Fix instructions:ppp support in Sapphire Rapids 2021-06-23 18:30:55 +02:00
zhaoxin x86: Fix various typos in comments 2021-03-18 15:31:53 +01:00
core.c perf/x86: Reset the dirty counter to prevent the leak for an RDPMC task 2021-06-17 14:11:47 +02:00
Kconfig treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
Makefile perf/x86/rapl: Fix RAPL config variable bug 2020-06-02 11:52:56 +02:00
msr.c perf/x86/msr: Add Alder Lake CPU support 2021-04-19 20:03:29 +02:00
perf_event.h perf/x86: Reset the dirty counter to prevent the leak for an RDPMC task 2021-06-17 14:11:47 +02:00
probe.c perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
probe.h perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
rapl.c perf/x86/rapl: Add support for Intel Alder Lake 2021-04-19 20:03:30 +02:00