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On the mv78xx0 development board, eth2 and eth3 do not have
corresponding PHYs, but are internally connected, as a way of
facilitating communication between the two CPU cores. Since there are
no PHYs, we need to tell the network driver explicitly to force the
link on eth2 and eth3 up, to 1000 Mb/s full duplex.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
04185fc67c