Borislav Petkov 2632daebaf x86/cpu: Restore AMD's DE_CFG MSR after resume ... DE_CFG contains the LFENCE serializing bit, restore it on resume too. This is relevant to older families due to the way how they do S3. Unify and correct naming while at it. Fixes: e4d0e84e49 ("x86/cpu/AMD: Make LFENCE a serializing instruction") Reported-by: Andrew Cooper <Andrew.Cooper3@citrix.com> Reported-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: <stable@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>		2022-11-15 10:15:58 -08:00
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alpha/include
arc/include/uapi/asm
arm/include
arm64/include	tools headers arm64: Sync arm64's cputype.h with the kernel sources	2022-10-25 17:40:48 -03:00
csky/include/uapi/asm
hexagon/include/uapi/asm
ia64/include	ia64: tools: remove duplicate definition of ia64_mf() on ia64	2021-04-16 16:10:37 -07:00
microblaze/include/uapi/asm
mips/include	perf tools: Copy uapi/asm/perf_regs.h from the kernel for MIPS	2021-06-01 10:07:46 -03:00
parisc/include/uapi/asm	parisc: Add MAP_UNINITIALIZED define	2020-10-15 08:10:39 +02:00
powerpc/include	perf powerpc: Add support to expose instruction and data address registers as part of extended regs	2021-10-25 13:47:42 -03:00
riscv/include/uapi/asm	Replace HTTP links with HTTPS ones: RISC-V	2020-07-30 11:37:40 -07:00
s390/include	tools headers kvm s390: Sync headers with the kernel sources	2022-08-19 15:30:34 -03:00
sh/include
sparc/include
x86	x86/cpu: Restore AMD's DE_CFG MSR after resume	2022-11-15 10:15:58 -08:00
xtensa/include