David Daney 2c8c53e28f MIPS: Optimize TLB handlers for Octeon CPUs
Octeon can use scratch registers in the TLB handlers.  Octeon II can
use LDX instructions.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1904/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:23 +01:00
..
2010-08-14 22:26:53 +02:00
2010-08-05 13:26:27 +01:00
2009-12-17 01:56:56 +00:00
2010-11-01 15:38:34 -04:00