bb6d3fa98a
The old SD handling code was huge and could not handle all the details which showed up on R-Car Gen3 SoCs meanwhile. It is time to switch to another design. Have SDnH a separate clock, use the existing divider clocks and move the errata handling from the clock driver to the SDHI driver where it belongs. This patch removes the old SD handling code and switch to the new one. This updates the SDHI driver at the same time. Because the SDHI driver can only communicate with the clock driver via clk_set_rate(), I don't see an alternative to this flag-day-approach, so we cross subsystems here. The patch sadly looks messy for the CPG lib, but it is basically a huge chunk of code removed and smaller chunks added. It looks much better when you just view the resulting source file. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Link: https://lore.kernel.org/r/20211110191610.5664-6-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
95 lines
2.5 KiB
C
95 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Renesas Mobile SDHI
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*
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* Copyright (C) 2017 Horms Solutions Ltd., Simon Horman
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* Copyright (C) 2017-19 Renesas Electronics Corporation
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*/
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#ifndef RENESAS_SDHI_H
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#define RENESAS_SDHI_H
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#include <linux/platform_device.h>
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#include "tmio_mmc.h"
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struct renesas_sdhi_scc {
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unsigned long clk_rate; /* clock rate for SDR104 */
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u32 tap; /* sampling clock position for SDR104/HS400 (8 TAP) */
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u32 tap_hs400_4tap; /* sampling clock position for HS400 (4 TAP) */
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};
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#define SDHI_FLAG_NEED_CLKH_FALLBACK BIT(0)
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struct renesas_sdhi_of_data {
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unsigned long tmio_flags;
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u32 tmio_ocr_mask;
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unsigned long capabilities;
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unsigned long capabilities2;
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enum dma_slave_buswidth dma_buswidth;
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dma_addr_t dma_rx_offset;
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unsigned int bus_shift;
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int scc_offset;
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struct renesas_sdhi_scc *taps;
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int taps_num;
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unsigned int max_blk_count;
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unsigned short max_segs;
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unsigned long sdhi_flags;
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};
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#define SDHI_CALIB_TABLE_MAX 32
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struct renesas_sdhi_quirks {
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bool hs400_disabled;
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bool hs400_4taps;
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u32 hs400_bad_taps;
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const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
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};
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struct renesas_sdhi_of_data_with_quirks {
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const struct renesas_sdhi_of_data *of_data;
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const struct renesas_sdhi_quirks *quirks;
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};
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struct tmio_mmc_dma {
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enum dma_slave_buswidth dma_buswidth;
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bool (*filter)(struct dma_chan *chan, void *arg);
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void (*enable)(struct tmio_mmc_host *host, bool enable);
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struct completion dma_dataend;
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struct tasklet_struct dma_complete;
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};
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struct renesas_sdhi {
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struct clk *clk;
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struct clk *clkh;
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struct clk *clk_cd;
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struct tmio_mmc_data mmc_data;
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struct tmio_mmc_dma dma_priv;
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const struct renesas_sdhi_quirks *quirks;
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struct pinctrl *pinctrl;
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struct pinctrl_state *pins_default, *pins_uhs;
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void __iomem *scc_ctl;
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u32 scc_tappos;
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u32 scc_tappos_hs400;
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const u8 *adjust_hs400_calib_table;
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bool needs_adjust_hs400;
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/* Tuning values: 1 for success, 0 for failure */
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DECLARE_BITMAP(taps, BITS_PER_LONG);
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/* Sampling data comparison: 1 for match, 0 for mismatch */
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DECLARE_BITMAP(smpcmp, BITS_PER_LONG);
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unsigned int tap_num;
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unsigned int tap_set;
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struct reset_control *rstc;
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};
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#define host_to_priv(host) \
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container_of((host)->pdata, struct renesas_sdhi, mmc_data)
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int renesas_sdhi_probe(struct platform_device *pdev,
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const struct tmio_mmc_dma_ops *dma_ops,
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const struct renesas_sdhi_of_data *of_data,
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const struct renesas_sdhi_quirks *quirks);
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int renesas_sdhi_remove(struct platform_device *pdev);
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#endif
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