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Amdgpu driver is used in an extensive range of devices, and each ASIC has some specific configuration. As a result of this variety, sometimes it is hard to identify the correct block that might cause the issue. This commit expands the amdgpu kernel-doc to alleviate this issue by introducing one ASIC table that describes dGPU and another one that shares the APU info. Cc: Harry Wentland <harry.wentland@amd.com> Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Cc: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Cc: Hersen Wu <hersenxs.wu@amd.com> Cc: Alex Hung <alex.hung@amd.com> Cc: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: Simon Ser <contact@emersion.fr> Cc: Pekka Paalanen <pekka.paalanen@collabora.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Mark Yacoub <markyacoub@chromium.org> Cc: Pierre-Loup <pgriffais@valvesoftware.com> Cc: Michel Dänzer <michel.daenzer@mailbox.org> Cc: Kent Russell <Kent.Russell@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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| 1 | Product Name | Code Reference | DCN/DCE version | GC version | VCE/UVD/VCN version | SDMA version |
|---|---|---|---|---|---|---|
| 2 | Radeon R* Graphics | CARRIZO/STONEY | DCE 11 | 8 | VCE 3 / UVD 6 | 3 |
| 3 | Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx | RAVEN/PICASSO | DCN 1.0 | 9.1.0 | VCN 1.0 | 4.1.0 |
| 4 | Ryzen 4000 series | RENOIR | DCN 2.1 | 9.3 | VCN 2.2 | 4.1.2 |
| 5 | Ryzen 3000 series / AMD Ryzen Embedded V1*/R1* with Radeon Vega Gfx | RAVEN2 | DCN 1.0 | 9.2.2 | VCN 1.0.1 | 4.1.1 |
| 6 | SteamDeck | VANGOGH | DCN 3.0.1 | 10.3.1 | VCN 3.1.0 | 5.2.1 |
| 7 | Ryzen 5000 series | GREEN SARDINE | DCN 2.1 | 9.3 | VCN 2.2 | 4.1.1 |
| 8 | Ryzen 6000 Zen | YELLOW CARP | 3.1.2 | 10.3.3 | VCN 3.1.1 | 5.2.3 |