Add the mfd driver for the Platform Management Component Interface (PMCI) based interface of Intel MAX10 BMC controller. PMCI is a software-visible interface, connected to card BMC which provided the basic functionality of read/write BMC register. The access to the register is done indirectly via a hardware controller/bridge that handles read/write/clear commands and acknowledgments for the commands. Previously, intel-m10-bmc provided sysfs under /sys/bus/spi/devices/... which is generalized in this change because not all MAX10 BMC appear under SPI anymore. Co-developed-by: Tianfei zhang <tianfei.zhang@intel.com> Signed-off-by: Tianfei zhang <tianfei.zhang@intel.com> Co-developed-by: Russ Weight <russell.h.weight@intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Co-developed-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Reviewed-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230116100845.6153-11-ilpo.jarvinen@linux.intel.com
37 lines
1.3 KiB
Plaintext
37 lines
1.3 KiB
Plaintext
What: /sys/bus/.../drivers/intel-m10-bmc/.../bmc_version
|
|
Date: June 2020
|
|
KernelVersion: 5.10
|
|
Contact: Xu Yilun <yilun.xu@intel.com>
|
|
Description: Read only. Returns the hardware build version of Intel
|
|
MAX10 BMC chip.
|
|
Format: "0x%x".
|
|
|
|
What: /sys/bus/.../drivers/intel-m10-bmc/.../bmcfw_version
|
|
Date: June 2020
|
|
KernelVersion: 5.10
|
|
Contact: Xu Yilun <yilun.xu@intel.com>
|
|
Description: Read only. Returns the firmware version of Intel MAX10
|
|
BMC chip.
|
|
Format: "0x%x".
|
|
|
|
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address
|
|
Date: January 2021
|
|
KernelVersion: 5.12
|
|
Contact: Russ Weight <russell.h.weight@intel.com>
|
|
Description: Read only. Returns the first MAC address in a block
|
|
of sequential MAC addresses assigned to the board
|
|
that is managed by the Intel MAX10 BMC. It is stored in
|
|
FLASH storage and is mirrored in the MAX10 BMC register
|
|
space.
|
|
Format: "%02x:%02x:%02x:%02x:%02x:%02x".
|
|
|
|
What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count
|
|
Date: January 2021
|
|
KernelVersion: 5.12
|
|
Contact: Russ Weight <russell.h.weight@intel.com>
|
|
Description: Read only. Returns the number of sequential MAC
|
|
addresses assigned to the board managed by the Intel
|
|
MAX10 BMC. This value is stored in FLASH and is mirrored
|
|
in the MAX10 BMC register space.
|
|
Format: "%u".
|