6e332df7c3
Previously we calculated the device's acceptable L0s and L1 exit latencies in pcie_aspm_cap_init() and cached them in struct pcie_link_state. These values are only used in pcie_aspm_check_latency() where they are compared with the actual exit latencies of the link. This path is used when removing or changing the D state of the device, so it's relatively low frequency. To reduce the amount of per-link data we store, remove the acceptable[] arrays from struct pcie_link_state and calculate them directly from the already-cached Device Capabilities register when needed. [bhelgaas: use endpoint->devcap instead of reading it again] Link: https://lore.kernel.org/r/20211119193732.12343-4-refactormyself@gmail.com Signed-off-by: Saheed O. Bolarinwa <refactormyself@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
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| .. | ||
| aer_inject.c | ||
| aer.c | ||
| aspm.c | ||
| dpc.c | ||
| edr.c | ||
| err.c | ||
| Kconfig | ||
| Makefile | ||
| pme.c | ||
| portdrv_core.c | ||
| portdrv_pci.c | ||
| portdrv.h | ||
| ptm.c | ||
| rcec.c | ||