Paul Cercueil 868b70b9e6 MIPS: DTS: CI20: Parent MSCMUX clock to MPLL
This makes it possible to clock the SD cards much higher, as the MPLL is
running at 1.2 GHz by default. The previous parent was the EXT clock,
which caused the SD cards to be clocked at 24 MHz maximum.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2023-06-09 09:55:38 +02:00
..
2023-04-28 14:02:54 -07:00
2022-05-04 22:22:59 +02:00
2022-05-04 22:22:59 +02:00
2023-05-01 12:06:20 -07:00
2023-04-28 14:02:54 -07:00
2022-09-12 15:33:24 +02:00
2021-01-22 11:40:00 +01:00
2023-04-27 17:46:52 -07:00
2023-06-09 09:49:59 +02:00
2021-10-18 18:09:54 +02:00
2022-05-04 22:22:59 +02:00
2022-05-04 22:22:59 +02:00
2023-06-09 09:53:26 +02:00