Peng Fan 92d1496fe8 clk: imx93: add MU1/2 clock
The clk tree should be as:
bus_aon_root------>\               /--->MU1_B IP
                    -->MU_B gate-->
bus_wakeup_root--->/               \--->MU2_B IP

bus_aon_root------>\               /--->MU1_A IP
                    -->MU_A gate-->
bus_wakeup_root--->/               \--->MU2_A IP

So need use shared count gate. And linux use MU_B,
so set MU_A clk as CLK_IGNORE_UNUSED.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20220830033137.4149542-8-peng.fan@oss.nxp.com
2022-09-19 13:06:45 +03:00
..
2022-03-11 18:22:15 -08:00
2022-08-04 12:12:54 -07:00
2022-09-19 13:06:45 +03:00
2022-03-11 18:22:15 -08:00
2022-03-11 18:22:15 -08:00
2021-11-02 14:28:51 -07:00