Evan Quan a64c9e15e6 drm/amd/powerplay: cleanup the interfaces for powergate setting through SMU ...

Provided an unified entry point. And fixed the confusing that the API
usage is conflict with what the naming implies.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2020-01-07 12:01:54 -05:00

..

hwmgr

drm/amd/powerplay: use true, false for bool variable in vega20_hwmgr.c

2020-01-07 11:56:16 -05:00

inc

drm/amd/powerplay: unified VRAM address for driver table interaction with SMU V2

2020-01-07 12:01:32 -05:00

smumgr

drm/amd/powerplay: issue proper hdp flush for table transferring

2020-01-07 12:01:48 -05:00

amd_powerplay.c

drm/amd/powerplay: refine code to support no-dpm case

2020-01-07 12:01:40 -05:00

amdgpu_smu.c

drm/amd/powerplay: cleanup the interfaces for powergate setting through SMU

2020-01-07 12:01:54 -05:00

arcturus_ppt.c

drm/amd/powerplay: refine code to support no-dpm case

2020-01-07 12:01:40 -05:00

arcturus_ppt.h

drm/amd/powerplay: update arcturus_ppt.c/h V3

2019-07-30 23:48:33 -05:00

Makefile

drm/amdgpu/powerplay: add smu ip block for renoir (v2)

2019-08-22 17:36:58 -05:00

navi10_ppt.c

drm/amd/powerplay: unified VRAM address for driver table interaction with SMU V2

2020-01-07 12:01:32 -05:00

navi10_ppt.h

drm/amdgpu/smu: custom pstate profiling clock frequence for navi series asics

2020-01-07 12:01:09 -05:00

renoir_ppt.c

drm/amd/powerplay: unified VRAM address for driver table interaction with SMU V2

2020-01-07 12:01:32 -05:00

renoir_ppt.h

drm/amd/powerplay: implement sysfs for getting dpm clock

2019-09-13 17:49:19 -05:00

smu_internal.h

drm/amd/powerplay: unified VRAM address for driver table interaction with SMU V2

2020-01-07 12:01:32 -05:00

smu_v11_0.c

drm/amd/powerplay: unified VRAM address for driver table interaction with SMU V2

2020-01-07 12:01:32 -05:00

smu_v12_0.c

drm/amd/powerplay: unified VRAM address for driver table interaction with SMU V2

2020-01-07 12:01:32 -05:00

vega20_ppt.c

drm/amd/powerplay: unified VRAM address for driver table interaction with SMU V2

2020-01-07 12:01:32 -05:00

vega20_ppt.h

drm/amd/powerplay: simplified od_settings for each asic

2019-06-21 18:59:32 -05:00