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linux/arch/riscv/kernel
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Zihao Yu ac8d0b901f
riscv,entry: fix misaligned base for excp_vect_table 
In RV64, the size of each entry in excp_vect_table is 8 bytes. If the
base of the table is not 8-byte aligned, loading an entry in the table
will raise a misaligned exception. Although such exception will be
handled by opensbi/bbl, this still causes performance degradation.

Signed-off-by: Zihao Yu <yuzihao@ict.ac.cn>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-04-01 21:37:05 -07:00
..
probes
ftrace: Fix spelling mistake "disabed" -> "disabled"
2021-03-16 21:19:40 -07:00
vdso
riscv: Disable KSAN_SANITIZE for vDSO
2021-02-22 17:51:23 -08:00
.gitignore
.gitignore: add SPDX License Identifier
2020-03-25 11:50:48 +01:00
asm-offsets.c
riscv: Enable per-task stack canaries
2021-01-14 15:09:10 -08:00
cacheinfo.c
riscv: cacheinfo: Fix using smp_processor_id() in preemptible
2021-01-12 20:25:32 -08:00
cpu_ops_sbi.c
RISC-V: Support cpu hotplug
2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c
RISC-V: Add cpu_ops and modify default booting method
2020-03-31 11:25:56 -07:00
cpu_ops.c
treewide: Convert macro and uses of __section(foo) to __section("foo")
2020-10-25 14:51:49 -07:00
cpu-hotplug.c
RISC-V: Support cpu hotplug
2020-03-31 11:28:30 -07:00
cpu.c
RISC-V: Rename and move plic_find_hart_id() to arch directory
2020-06-09 19:11:20 -07:00
cpufeature.c
RISC-V: Add bitmap reprensenting ISA features common across CPUs
2020-05-04 14:08:59 -07:00
efi-header.S
RISC-V: Add PE/COFF header for EFI stub
2020-10-02 14:31:16 -07:00
efi.c
RISC-V: Add EFI runtime services
2020-10-02 14:31:28 -07:00
entry.S
riscv,entry: fix misaligned base for excp_vect_table
2021-04-01 21:37:05 -07:00
fpu.S
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
ftrace.c
riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT
2021-01-14 15:09:05 -08:00
head.h
RISC-V: Move DT mapping outof fixmap
2020-10-02 14:30:57 -07:00
head.S
riscv: add BUILTIN_DTB support for MMU-enabled targets
2021-02-18 23:17:54 -08:00
image-vars.h
arch/riscv:fix typo in a comment in arch/riscv/kernel/image-vars.h
2021-02-18 23:18:00 -08:00
irq.c
RISC-V: Remove do_IRQ() function
2020-06-09 19:11:24 -07:00
jump_label.c
riscv: Add jump-label implementation
2020-07-30 11:37:43 -07:00
kgdb.c
riscv: Fix "no previous prototype" compile warning in kgdb.c file
2020-07-09 20:09:30 -07:00
Makefile
riscv: syscall_table: Reduce W=1 compilation warnings noise
2021-03-09 20:46:04 -08:00
mcount-dyn.S
riscv: Using PATCHABLE_FUNCTION_ENTRY instead of MCOUNT
2021-01-14 15:09:05 -08:00
mcount.S
RISC-V: remove the unused return_to_handler export
2018-10-22 17:38:12 -07:00
module-sections.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
module.c
riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs
2020-07-30 11:37:41 -07:00
patch.c
riscv: Fixup compile error BUILD_BUG_ON failed
2021-01-14 15:09:01 -08:00
perf_callchain.c
riscv: Make stack walk callback consistent with generic code
2020-11-20 18:53:38 -08:00
perf_event.c
riscv: perf_event: Make some funciton static
2020-05-11 13:48:19 -07:00
perf_regs.c
perf/arch: Remove perf_sample_data::regs_user_copy
2020-11-09 18:12:34 +01:00
process.c
riscv: process: Fix no prototype for show_regs
2021-03-09 20:46:05 -08:00
ptrace.c
RISC-V: Implement ptrace regs and stack API
2021-01-14 15:09:01 -08:00
reset.c
riscv: cleanup the default power off implementation
2019-11-13 13:22:52 -08:00
riscv_ksyms.c
riscv: provide memmove implementation
2020-12-10 17:27:54 -08:00
sbi.c
riscv: sbi: Fix comment of __sbi_set_timer_v01
2021-03-09 20:46:01 -08:00
setup.c
RISC-V: Fix out-of-bounds accesses in init_resources()
2021-03-16 21:55:11 -07:00
signal.c
riscv: Add uprobes supported
2021-01-14 15:09:08 -08:00
smp.c
RISC-V: Remove CLINT related code from timer and arch
2020-08-20 10:58:13 -07:00
smpboot.c
riscv: Add numa support for riscv64 platform
2021-01-14 15:08:58 -08:00
soc.c
riscv: Fix builtin DTB handling
2021-01-07 19:00:50 -08:00
stacktrace.c
riscv: Drop const annotation for sp
2021-04-01 21:37:03 -07:00
sys_riscv.c
RISC-V: Don't allow write+exec only page mapping request in mmap
2020-06-18 17:28:53 -07:00
syscall_table.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
time.c
riscv: time: Fix no prototype for time_init
2021-03-09 20:46:03 -08:00
traps_misaligned.c
riscv: Unaligned load/store handling for M_MODE
2020-04-03 10:45:33 -07:00
traps.c
riscv: traps: Fix no prototype warnings
2021-03-09 20:45:51 -08:00
vdso.c
riscv: Fixup CONFIG_GENERIC_TIME_VSYSCALL
2021-01-12 20:34:44 -08:00
vmlinux.lds.S
RISC-V: Move dynamic relocation section under __init
2020-11-25 16:05:29 -08:00