Felix Fietkau 99ba6a4610 ath9k: implement buffer holding handling for EDMA FIFO
Inside one FIFO slot queue, EDMA chipsets have the same link pointer
re-read race condition as older chipsets, so the same buffer holding
logic needs to be used in order to avoid use-after-free bugs.
Unlike on older chips, it can be skipped for the end of the queue.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
2013-04-10 14:10:34 -04:00
..
2013-03-20 08:55:26 -04:00
2013-03-13 14:27:35 -04:00
2011-08-08 16:04:13 -04:00
2013-01-14 11:32:44 +01:00
2013-01-14 11:32:44 +01:00