Jordan Crouse c09513cfeb drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter ...

Even though the default countable for CP0 is CP_ALWAYS_COUNT (0),
program the selector during HW initialization in an effort to be
up front about which counters are programmed and why.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

2018-01-10 08:58:42 -05:00

..

drm

drm/msm/adreno: a5xx: Explicitly program the CP0 performance counter

2018-01-10 08:58:42 -05:00

host1x

main drm pull request for v4.15

2017-11-15 20:42:10 -08:00

ipu-v3

fixes/cleanups for rc1, non-desktop flags for VR

2017-11-23 21:04:56 -10:00

vga

vgaarb: Factor out EFI and fallback default device selection

2017-10-18 10:04:56 +02:00

Makefile

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