Emil Renner Berthing d4b95c445c riscv: dts: starfive: Add JH7100 cache controller
The StarFive JH7100 SoC also features the SiFive L2 cache controller,
so add the device tree nodes for it.

Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-12-13 15:50:23 +00:00
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