Kai Ye bffa1fc065 crypto: hisilicon/sec - only HW V2 needs to change the BD err detection ...

The base register address of V2 and V3 are different. HW V3 not needs
to change the BD err detection.

Signed-off-by: Kai Ye <yekai13@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

2022-06-17 17:19:21 +08:00

..

hpre

crypto: hisilicon/hpre - support last word dumping

2022-04-15 16:34:29 +08:00

sec

crypto: hisilicon/sec - use the correct print format

2021-04-16 21:16:33 +10:00

sec2

crypto: hisilicon/sec - only HW V2 needs to change the BD err detection

2022-06-17 17:19:21 +08:00

trng

crypto: hisilicon/trng - fix local variable type

2022-06-17 17:19:20 +08:00

zip

crypto: hisilicon/qm - move alloc qm->wq to qm.c

2022-06-17 17:19:20 +08:00

Kconfig

crypto: hisilicon/sec - add sm4 generic selection

2022-05-06 18:16:55 +08:00

Makefile

crypto: hisilicon/trng - add HiSilicon TRNG driver support

2020-11-27 17:13:43 +11:00

qm.c

crypto: hisilicon/qm - modify event irq processing

2022-06-17 17:19:20 +08:00

sgl.c

crypto: hisilicon/sgl - align the hardware sgl dma address

2022-04-15 16:34:30 +08:00