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linux/arch/riscv/kernel
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Andreas Schwab 732e8e4130
RISC-V: properly determine hardware caps 
On the Hifive-U platform, cpu 0 is a masked cpu with less capabilities
than the other cpus.  Ignore it for the purpose of determining the
hardware capabilities of the system.

Signed-off-by: Andreas Schwab <schwab@suse.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-10-31 12:13:43 -07:00
..
vdso
RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSO
2018-08-13 08:31:28 -07:00
.gitignore
RISC-V: Build Infrastructure
2017-09-26 15:26:49 -07:00
asm-offsets.c
RISC-V: Task implementation
2017-09-26 15:26:46 -07:00
cacheinfo.c
RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}
2018-10-22 17:37:41 -07:00
cpu.c
RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfo
2018-10-22 17:03:37 -07:00
cpufeature.c
RISC-V: properly determine hardware caps
2018-10-31 12:13:43 -07:00
entry.S
RISC-V: SMP cleanup and new features
2018-10-22 17:41:43 -07:00
fpu.S
Extract FPU context operations from entry.S
2018-10-22 17:02:22 -07:00
ftrace.c
riscv/ftrace: Add HAVE_FUNCTION_GRAPH_RET_ADDR_PTR support
2018-04-02 19:59:13 -07:00
head.S
RISC-V: Use Linux logical CPU number instead of hartid
2018-10-22 17:03:37 -07:00
irq.c
RISC-V: Show IPI stats
2018-10-22 17:03:37 -07:00
Makefile
Allow to disable FPU support
2018-10-22 17:02:23 -07:00
mcount-dyn.S
riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support
2018-04-02 19:59:13 -07:00
mcount.S
RISC-V: remove the unused return_to_handler export
2018-10-22 17:38:12 -07:00
module-sections.c
RISC-V: Add section of GOT.PLT for kernel module
2018-04-02 20:00:54 -07:00
module.c
RISC-V: Fix the rv32i kernel build
2018-07-04 14:12:53 -07:00
module.lds
RISC-V: Add section of GOT.PLT for kernel module
2018-04-02 20:00:54 -07:00
perf_event.c
RISC-V: Fix !CONFIG_SMP compilation error
2018-08-13 08:31:32 -07:00
process.c
Auto-detect whether a FPU exists
2018-10-22 17:02:23 -07:00
ptrace.c
RISC-V: Add FP register ptrace support for gdb.
2018-10-22 17:38:04 -07:00
reset.c
RISC-V: Init and Halt Code
2017-09-26 15:26:44 -07:00
riscv_ksyms.c
riscv: split the declaration of __copy_user
2018-06-09 12:34:31 -07:00
setup.c
RISC-V: SMP cleanup and new features
2018-10-22 17:41:43 -07:00
signal.c
Auto-detect whether a FPU exists
2018-10-22 17:02:23 -07:00
smp.c
RISC-V: Show IPI stats
2018-10-22 17:03:37 -07:00
smpboot.c
RISC-V: Use Linux logical CPU number instead of hartid
2018-10-22 17:03:37 -07:00
stacktrace.c
riscv/ftrace: Add HAVE_FUNCTION_GRAPH_RET_ADDR_PTR support
2018-04-02 19:59:13 -07:00
sys_riscv.c
RISC-V: Use a less ugly workaround for unused variable warnings
2018-08-28 12:58:36 -07:00
syscall_table.c
RISC-V: Make __NR_riscv_flush_icache visible to userspace
2018-01-07 15:14:37 -08:00
time.c
clocksource: new RISC-V SBI timer driver
2018-08-13 08:31:31 -07:00
traps.c
RISC-V: Don't increment sepc after breakpoint.
2018-08-13 08:31:30 -07:00
vdso.c
riscv: remove redundant unlikely()
2018-01-30 19:12:06 -08:00
vmlinux.lds.S
RISC-V: Build Infrastructure
2017-09-26 15:26:49 -07:00