2c91bf6bf2
There are two different PCIe PHYs on SM8450, one having one lane (v5) and another with two lanes (v5.20). This commit adds support for the second PCIe phy. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211218141754.503661-3-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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.. | ||
Kconfig | ||
Makefile | ||
phy-ath79-usb.c | ||
phy-qcom-apq8064-sata.c | ||
phy-qcom-edp.c | ||
phy-qcom-ipq806x-sata.c | ||
phy-qcom-ipq806x-usb.c | ||
phy-qcom-ipq4019-usb.c | ||
phy-qcom-pcie2.c | ||
phy-qcom-qmp.c | ||
phy-qcom-qmp.h | ||
phy-qcom-qusb2.c | ||
phy-qcom-snps-femto-v2.c | ||
phy-qcom-usb-hs-28nm.c | ||
phy-qcom-usb-hs.c | ||
phy-qcom-usb-hsic.c | ||
phy-qcom-usb-ss.c |