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Xiu Jianfeng 5b0a1f1247 clk: rockchip: Fix memory leak in rockchip_clk_register_pll() 
[ Upstream commit 739a6a6bbdb793bd57938cb24aa5a6df89983546 ]

If clk_register() fails, @pll->rate_table may have allocated memory by
kmemdup(), so it needs to be freed, otherwise will cause memory leak
issue, this patch fixes it.

Fixes: 90c590254051 ("clk: rockchip: add clock type for pll clocks and pll used on rk3066")
Signed-off-by: Xiu Jianfeng <xiujianfeng@huawei.com>
Link: https://lore.kernel.org/r/20221123091201.199819-1-xiujianfeng@huawei.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-12-31 13:14:11 +01:00
..
clk-cpu.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-ddr.c
clk: rockchip: Export rockchip_clk_register_ddrclk()
2020-09-22 15:16:37 +02:00
clk-half-divider.c
clk: rockchip: Demote non-conformant kernel-doc header in half-divider
2021-01-26 00:24:05 +01:00
clk-inverter.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
2019-05-30 11:26:37 -07:00
clk-mmc-phase.c
clk: rockchip: fix mmc get phase
2020-03-06 12:06:01 -08:00
clk-muxgrf.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
2019-06-05 17:36:37 +02:00
clk-pll.c
clk: rockchip: Fix memory leak in rockchip_clk_register_pll()
2022-12-31 13:14:11 +01:00
clk-px30.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-rk3036.c
clk: rockchip: Add support for hclk_sfc on rk3036
2021-07-16 00:33:42 +02:00
clk-rk3128.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-rk3188.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-rk3228.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-rk3288.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-rk3308.c
clk: rockchip: make rk3308 ddrphy4x clock critical
2021-07-29 12:43:11 +02:00
clk-rk3328.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-rk3368.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk-rk3399.c
clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller
2021-03-21 11:13:30 +01:00
clk-rk3568.c
clk: rockchip: drop CLK_SET_RATE_PARENT from dclk_vop* on rk3568
2022-04-13 20:59:11 +02:00
clk-rv1108.c
clk: rockchip: support more core div setting
2021-03-21 11:10:58 +01:00
clk.c
clk: rockchip: re-add rational best approximation algorithm to the fractional divider
2022-04-08 14:22:50 +02:00
clk.h
clk: rockchip: Optimize PLL table memory usage
2021-05-11 12:22:29 +02:00
Kconfig
clk: rockchip: drop parenthesis from ARM || COMPILE_TEST depends
2021-03-21 11:13:30 +01:00
Makefile
clk: rockchip: add clock controller for rk3568
2021-03-21 11:10:59 +01:00
softrst.c
clk: rockchip: Export rockchip_register_softrst()
2020-09-22 15:16:38 +02:00