Quentin Schulz 5aa6d84a0b clk: rockchip: re-add rational best approximation algorithm to the fractional divider ...

commit 10b74af310735860510a533433b1d3ab2e05a138 upstream.

In commit 4e7cf74fa3b2 ("clk: fractional-divider: Export approximation
algorithm to the CCF users"), the code handling the rational best
approximation algorithm was replaced by a call to the core
clk_fractional_divider_general_approximation function which did the same
thing back then.

However, in commit 82f53f9ee577 ("clk: fractional-divider: Introduce
POWER_OF_TWO_PS flag"), this common code was made conditional on
CLK_FRAC_DIVIDER_POWER_OF_TWO_PS flag which was not added back to the
rockchip clock driver.

This broke the ltk050h3146w-a2 MIPI DSI display present on a PX30-based
downstream board.

Let's add the flag to the fractional divider flags so that the original
and intended behavior is brought back to the rockchip clock drivers.

Fixes: 82f53f9ee577 ("clk: fractional-divider: Introduce POWER_OF_TWO_PS flag")
Cc: stable@vger.kernel.org
Cc: Quentin Schulz <foss+kernel@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20220131163224.708002-1-quentin.schulz@theobroma-systems.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

2022-04-08 14:22:50 +02:00

..

clk-cpu.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-ddr.c

clk: rockchip: Export rockchip_clk_register_ddrclk()

2020-09-22 15:16:37 +02:00

clk-half-divider.c

clk: rockchip: Demote non-conformant kernel-doc header in half-divider

2021-01-26 00:24:05 +01:00

clk-inverter.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157

2019-05-30 11:26:37 -07:00

clk-mmc-phase.c

clk: rockchip: fix mmc get phase

2020-03-06 12:06:01 -08:00

clk-muxgrf.c

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282

2019-06-05 17:36:37 +02:00

clk-pll.c

clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types

2021-07-29 11:22:29 +02:00

clk-px30.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-rk3036.c

clk: rockchip: Add support for hclk_sfc on rk3036

2021-07-16 00:33:42 +02:00

clk-rk3128.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-rk3188.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-rk3228.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-rk3288.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-rk3308.c

clk: rockchip: make rk3308 ddrphy4x clock critical

2021-07-29 12:43:11 +02:00

clk-rk3328.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-rk3368.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk-rk3399.c

clk: rockchip: drop MODULE_ALIAS from rk3399 clock controller

2021-03-21 11:13:30 +01:00

clk-rk3568.c

clk: rockchip: fix rk3568 cpll clk gate bits

2021-05-24 01:49:45 +02:00

clk-rv1108.c

clk: rockchip: support more core div setting

2021-03-21 11:10:58 +01:00

clk.c

clk: rockchip: re-add rational best approximation algorithm to the fractional divider

2022-04-08 14:22:50 +02:00

clk.h

clk: rockchip: Optimize PLL table memory usage

2021-05-11 12:22:29 +02:00

Kconfig

clk: rockchip: drop parenthesis from ARM || COMPILE_TEST depends

2021-03-21 11:13:30 +01:00

Makefile

clk: rockchip: add clock controller for rk3568

2021-03-21 11:10:59 +01:00

softrst.c

clk: rockchip: Export rockchip_register_softrst()

2020-09-22 15:16:38 +02:00