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This adds support for the Tegra30-based Ouya game console and enhances a
number of existing device trees. It also fixes a couple of minor issues
that were found during DT validation.
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Merge tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.11-rc1
This adds support for the Tegra30-based Ouya game console and enhances a
number of existing device trees. It also fixes a couple of minor issues
that were found during DT validation.
* tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (23 commits)
ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
ARM: tegra: Add interconnect properties to Tegra124 device-tree
ARM: tegra: Add interconnect properties to Tegra30 device-tree
ARM: tegra: Add interconnect properties to Tegra20 device-tree
ARM: tegra: acer-a500: Add Embedded Controller
ARM: tegra: Change order of SATA resets for Tegra124
ARM: tegra: Correct EMC registers size in Tegra20 device-tree
ARM: tegra: Properly align clocks for SOCTHERM
ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
ARM: tegra: Populate OPP table for Tegra20 Ventana
ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
ARM: tegra: nexus7: Rename gpio-hog nodes
ARM: tegra: nexus7: Add power-supply to lvds-encoder node
ARM: tegra: nexus7: Improve CPU passive-cooling threshold
ARM: tegra: nexus7: Correct thermal zone names
...
Link: https://lore.kernel.org/r/20201127144329.124891-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains a couple of conversions of bindings to json-schema, as
well as symbolic names for the various memory clients on Tegra20,
Tegra30 and Tegra124. There's also a couple of fixes for Tegra194
pinmux and ARM GIC bindings. Finally, a new vendor prefix is added
for Ouya and the Ouya game console compatible string is defined.
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Merge tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.11-rc1
This contains a couple of conversions of bindings to json-schema, as
well as symbolic names for the various memory clients on Tegra20,
Tegra30 and Tegra124. There's also a couple of fixes for Tegra194
pinmux and ARM GIC bindings. Finally, a new vendor prefix is added
for Ouya and the Ouya game console compatible string is defined.
* tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: bus: Convert ACONNECT doc to json-schema
dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
dt-bindings: dma: Convert ADMA doc to json-schema
dt-bindings: Fix entry name for I/O High Voltage property
dt-bindings: ARM: tegra: Add Ouya game console
dt-bindings: Add vendor prefix for Ouya Inc.
dt-bindings: memory: tegra124: Add memory client IDs
dt-bindings: memory: tegra30: Add memory client IDs
dt-bindings: memory: tegra20: Add memory client IDs
Link: https://lore.kernel.org/r/20201127144329.124891-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- PCIe endpoint support for the R-Car H3 ES2.0+ SoC.
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Merge tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.11 (take two)
- PCIe endpoint support for the R-Car H3 ES2.0+ SoC.
* tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a77951: Add PCIe EP nodes
Link: https://lore.kernel.org/r/20201127132155.77418-2-geert@linux-m68k.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Highlights:
----------
MCU part:
-Fix dmamux reg property (length) on stm32h743.
-Explicitly set DCMI bus type on stm32429i eval board.
MPU part:
-Enable FIFO mode with half-full threshold for DCMI.
-Harmonize EHCI/OHCI nodes.
-Move SDMMC IP version to v2.0 to get features improvements.
-Add LP-timer wakeup support.
-Enable crypto/hash/crc support.
-Explicitly set DCMI bus type on stm32mp157 eval board.
-Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
(It is connected to I2C4).
-Fix dmamux reg property (length) on stm32mp151.
-Optimize USB OTG FIFO sizes on stm32mp151.
-Declare tamp node also as "simple-mfd".
-LXA:
-Document Octavo vendor-prefixes yaml file.
-Document lxa,stm32mp157c-mc1 in STM32 yaml file.
-DH:
-Connect PHY IRQ line on DH SoM.
-Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
-Document all DH compatible strings in STM32 yaml file.
-Add DHCOM based PicoITX board. This board embedds ethernet port,
USB, CAN LEDS and a custom board-to-board connector.
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Merge tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.11, round 1
Highlights:
----------
MCU part:
-Fix dmamux reg property (length) on stm32h743.
-Explicitly set DCMI bus type on stm32429i eval board.
MPU part:
-Enable FIFO mode with half-full threshold for DCMI.
-Harmonize EHCI/OHCI nodes.
-Move SDMMC IP version to v2.0 to get features improvements.
-Add LP-timer wakeup support.
-Enable crypto/hash/crc support.
-Explicitly set DCMI bus type on stm32mp157 eval board.
-Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
(It is connected to I2C4).
-Fix dmamux reg property (length) on stm32mp151.
-Optimize USB OTG FIFO sizes on stm32mp151.
-Declare tamp node also as "simple-mfd".
-LXA:
-Document Octavo vendor-prefixes yaml file.
-Document lxa,stm32mp157c-mc1 in STM32 yaml file.
-DH:
-Connect PHY IRQ line on DH SoM.
-Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
-Document all DH compatible strings in STM32 yaml file.
-Add DHCOM based PicoITX board. This board embedds ethernet port,
USB, CAN LEDS and a custom board-to-board connector.
* tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
ARM: dts: stm32: Add DHCOM based PicoITX board
dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
ARM: dts: stm32: fix dmamux reg property on stm32h743
ARM: dts: stm32: fix dmamux reg property on stm32mp151
ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
dt-bindings: connector: add typec-power-opmode property to usb-connector
ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
ARM: dts: stm32: enable CRYP by default on stm32mp15
ARM: dts: stm32: enable CRC1 by default on stm32mp15
...
Link: https://lore.kernel.org/r/873c17a5-28d5-9261-f691-1b917611c932@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Two non-urgent pandaboard updates to get gpio button and bluetooth
working on pandaboard-es
- Updates to follow devicetree binding docs for dwc3 and pwm-leds
- Add initial support for droid bionic based on what we have for droid4
- Add second sha instance for dra7
- Add eQEP nodes for am335x for boneblue
- Fix wrong comments for am335x gpio_31
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Merge tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.11 merge window
- Two non-urgent pandaboard updates to get gpio button and bluetooth
working on pandaboard-es
- Updates to follow devicetree binding docs for dwc3 and pwm-leds
- Add initial support for droid bionic based on what we have for droid4
- Add second sha instance for dra7
- Add eQEP nodes for am335x for boneblue
- Fix wrong comments for am335x gpio_31
* tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: am335x: Fix comments for AM335X_PIN_GPMC_WPN pin in GPIO mode
ARM: dts: am335x-boneblue: Enable eQEP
ARM: dts: am33xx: Add nodes for eQEP
ARM: dts: dra7: add second SHA instance
ARM: dts: xt875: add section for kionix kxtf9
ARM: dts: mapphone: separate out xt894 specific things
ARM: dts: omap: Fix schema warnings for pwm-leds
ARM: dts: omap5: Harmonize DWC USB3 DT nodes name
ARM: dts: am437x: Correct DWC USB3 compatible string
ARM: dts: pandaboard es: add bluetooth uart for HCI
ARM: dts: pandaboard: fix pinmux for gpio user button of Pandaboard ES
Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Cleanups of the hisilicon DTS to align with the dtschema. All of them do not
have any functional effect except passing dtschema checks or dtc W=2 builds.
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Merge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 DT updates for 5.11
- Cleanups of the hisilicon DTS to align with the dtschema. All of them do not
have any functional effect except passing dtschema checks or dtc W=2 builds.
* tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"
arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name
arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml
arm64: dts: hisilicon: list all clocks required by pl011.yaml
arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml
arm64: dts: hisilicon: normalize the node name of the UART devices
arm64: dts: hisilicon: normalize the node name of the usb devices
arm64: dts: hisilicon: normalize the node name of the SMMU devices
arm64: dts: hisilicon: place clock-names "biu" before "ciu"
arm64: dts: hisilicon: remove unused property pinctrl-names
arm64: dts: hisilicon: write the values of property-units into a uint32 array
arm64: dts: hisilicon: separate each group of data in the property "reg"
arm64: dts: hisilicon: normalize the node name of the ITS devices
Link: https://lore.kernel.org/r/5FBDC416.5060008@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Cleanups of the hisilicon DTS to align with the dtschema including
serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
have any functional effect except passing dtschema checks or dtc W=2
builds.
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Merge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 DT updates for 5.11
- Cleanups of the hisilicon DTS to align with the dtschema including
serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
have any functional effect except passing dtschema checks or dtc W=2
builds.
* tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: fix errors detected by syscon.yaml
ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
ARM: dts: hisilicon: fix errors detected by root-node.yaml
ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
ARM: dts: hisilicon: fix errors detected by usb yaml
ARM: dts: hisilicon: fix errors detected by pl011.yaml
ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
Link: https://lore.kernel.org/r/5FBDC347.4050102@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add EMC OPP tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.
Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add nvidia,memory-controller to the Tegra20 External Memory Controller
node. This allows to perform a direct lookup of the Memory Controller
instead of walking up the whole tree. This puts Tegra20 device-tree on
par with Tegra30+.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch adds device-tree node for the Embedded Controller which is
found on the Picasso board. The Embedded Controller itself is ENE KB930,
it provides functions like battery-gauge/LED/GPIO/etc and it uses firmware
that is specifically customized for the Acer A500 device.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra AHCI dt-binding doc is converted from text based to yaml based.
dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.
Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.
This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix the size of Tegra20 EMC registers, which should be twice bigger.
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
For some reason this was never hooked up. Do it now so that over-current
interrupts can be logged.
Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.
throttrip: pll: missing hot temperature
...
throttrip: mem: missing hot temperature
...
Adding them will clear the messages.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
On Jetson TK1 the following message can be seen:
tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop
This patch will fix the invalid prop issue according to the binding.
Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver
(Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the
generic CPUFREQ device-tree driver. Since this change CPUFREQ support
on the Tegra20 Ventana platform has been broken because the necessary
device-tree nodes with the operating point information are not populated
for this platform. Fix this by updating device-tree for Venata to
include the operating point informration for Tegra20.
Fixes: 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)")
Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Depending on a driver probe order, panel-simple driver may probe first,
which results in this error:
panel-simple display-panel: Reject override mode: panel has a fixed mode
We don't want to use panel-simple anyways because customized timings are
preferred for Nexus 7, hence remove the panel-simple compatibles from the
panel node.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Devicetree schema now requires gpio-hog nodes to have a certain naming
pattern, like a -hog suffix. This patch fixes dtbs_check warnings about
the names.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The current CPU thermal limit is a bit inappropriate for Nexus 7 once
device is getting used on a daily bases. For example, currently it's may
be impossible to watch a hardware accelerated 720p video without hitting
a severe CPU throttling, which ruins user experience. This patch improves
the thermal throttling thresholds.
In my experience setting CPU thermal threshold to 57C provides the most
reasonable result, where device is a bit warm under constant load and
not getting overly hot, in the same time performance is okay. Let's bump
the passive-cooling threshold from 50C to 57C and also lower the thermal
hysteresis to 0.2C in order to make throttling more reactive.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Ouya was the sole device produced by Ouya Inc in 2013.
It was a game console originally running Android 5 on top of Linux 3.1.10.
This patch adds the device tree supporting the Ouya.
It has been tested on the original variant with Samsung ram.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Correct the name of the I/O High Voltage Property from
'nvidia,io-high-voltage' to 'nvidia,io-hv'.
Fixes: 2585a584f844 ("pinctrl: Add Tegra194 pinctrl DT bindings")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a binding for the Tegra30-based Ouya game console.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Ouya is a defunct company from 2012 to 2015.
They produced a single device, the Ouya game console.
In 2015 they were purchased by Razer Inc. and the Ouya was discontinued.
All Ouya services were shuttered in 2019.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Earlier commit modified the binding, so the SiP is to be specified
as well. Adjust the device tree accordingly.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The Linux Automation MC-1 is built around an OSD32MP15x SiP with CPU,
RAM, PMIC, Oscillator and EEPROM. Adjust the binding, so the SiP
compatible is contained as well. This allows boot firmware to match
against it to apply fixups if necessary.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Octavo Systems is an American company specializing in design and
manufacturing of System-in-Package devices.
The prefix is already in use for the Octavo Systems OSD3358-SM-RED
device tree, but was so far undocumented. Fix this.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Neeraj Dantu <neeraj.dantu@octavosystems.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The stm32mp1 TAMP peripheral has 32 backup registers that survive
a warm reset. This makes them suitable for storing a reboot
mode, which the vendor's kernel tree is already doing[0].
The actual syscon-reboot-mode child node can be added by a board.dts or
fixed up by the bootloader. For the child node to be probed, the
compatible needs to include simple-mfd. The binding now specifies this,
so have the SoC dtsi adhere to it.
[0]: https://github.com/STMicroelectronics/linux/commit/2e9bfc29dd
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
The stm32mp1 TAMP (Tamper and backup registers) does tamper detection
and features 32 backup registers that, being in the RTC domain, may
survive even with Vdd switched off.
This makes it suitable for use to communicate a reboot mode from OS
to bootloader via the syscon-reboot-mode binding. Add a "simple-mfd"
to support probing such a child node. The actual reboot mode
node could then be defined in a board.dts or fixed up by the bootloader.
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Two backup registers are used to store the Cortex-M4 state and the resource
table address.
Declare the tamp node and add associated properties in m4_rproc node
to allow Linux to attach to a firmware loaded by the first boot stages.
Associated driver implementation is available in commit 9276536f455b3
("remoteproc: stm32: Parse syscon that will manage M4 synchronisation").
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk
endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes).
This patch optimizes USB OTG FIFO sizes accordingly.
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
