Commit Graph

507 Commits

Author SHA1 Message Date
Dennis YC Hsieh
0858fde496 mailbox: cmdq: variablize address shift in platform
Some gce hardware shift pc and end address in register to support
large dram addressing.
Implement gce address shift when write or read pc and end register.
And add shift bit in platform definition.

Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-08-03 23:56:38 -05:00
Konrad Dybcio
dde6805690 mailbox: qcom: Add msm8994 apcs compatible
MSM8994 has an APCS block similar to 8916, but
with a different clock driver due to the former
one having 2 clusters.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-08-03 23:31:34 -05:00
Konrad Dybcio
cfbf813e59 mailbox: qcom: Add sdm660 hmss compatible
The Qualcomm SDM660 platform has a APCS HMSS GLOBAL block, add the
compatible for this.

Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-08-03 23:30:09 -05:00
Nathan Chancellor
03b70130ab mailbox: imx: Mark PM functions as __maybe_unused
When CONFIG_PM and CONFIG_PM_SLEEP are unset, the following warnings
occur:

drivers/mailbox/imx-mailbox.c:638:12: warning: 'imx_mu_runtime_resume'
defined but not used [-Wunused-function]
  638 | static int imx_mu_runtime_resume(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:629:12: warning: 'imx_mu_runtime_suspend'
defined but not used [-Wunused-function]
  629 | static int imx_mu_runtime_suspend(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:611:12: warning: 'imx_mu_resume_noirq'
defined but not used [-Wunused-function]
  611 | static int imx_mu_resume_noirq(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:601:12: warning: 'imx_mu_suspend_noirq'
defined but not used [-Wunused-function]
  601 | static int imx_mu_suspend_noirq(struct device *dev)
      |            ^~~~~~~~~~~~~~~~~~~~

Mark these functions as __maybe_unused, which is the standard procedure
for PM functions.

Fixes: bb2b2624db ("mailbox: imx: Add runtime PM callback to handle MU clocks")
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-08-03 23:28:36 -05:00
Hanjun Guo
425ab03675 mailbox: pcc: Put the PCCT table for error path
The acpi_get_table() should be coupled with acpi_put_table() if
the mapped table is not used at runtime to release the table
mapping.

In acpi_pcc_probe(), the PCCT table entries will be used as private
data for communication chan at runtime, but the table should be put
for error path.

Signed-off-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-08-03 23:25:19 -05:00
Alexander A. Klimov
c3917df54c mailbox: Replace HTTP links with HTTPS ones
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.

Deterministic algorithm:
For each file:
  If not .svg:
    For each line:
      If doesn't contain `\bxmlns\b`:
        For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
	  If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
            If both the HTTP and HTTPS versions
            return 200 OK and serve the same content:
              Replace HTTP with HTTPS.

Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-08-03 23:24:43 -05:00
Sivaprakash Murugesan
e9f901dc05 mailbox: qcom: Add ipq6018 apcs compatible
The Qualcomm ipq6018 has apcs block, add compatible for the same. Also,
the ipq6018 apcs provides a clock functionality similar to msm8916 but
the clock driver is different.

Create a child device based on the apcs compatible for the clock
controller functionality.

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-06-10 22:43:57 -05:00
Sivaprakash Murugesan
9b007938ae mailbox: qcom: Add clock driver name in apcs mailbox driver data
Some apcs mailbox devices supports a clock driver, the compatible
strings of devices supporting clock driver along with the clock driver
name are maintained in a separate structure within the mailbox driver.
And the clock driver is added based on device match.

With increase in number of devices supporting the clock feature move the
clock driver name inside the driver data. so that we can use a single
API to get the register offset of mailbox driver and clock driver name
together, and the clock driver will be added based on the driver data.

Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-06-10 22:43:51 -05:00
Anson Huang
b7b2796b9b mailbox: imx: ONLY IPC MU needs IRQF_NO_SUSPEND flag
IPC MU has no power domain assigned and there could be IPC during
noirq suspend phase, so IRQF_NO_SUSPEND flag is needed for IPC MU.
However, for other MUs, they have power domain assigned and their
power will be turned off during noirq suspend phase, but with
IRQF_NO_SUSPEND set, their interrupts are NOT disabled even after
their power turned off, it will cause system crash when mailbox
driver trys to handle pending interrupts but the MU power is already
turned off.

So, IRQF_NO_SUSPEND flag should ONLY be added to IPC MU which has
power domain managed by SCU, then all other MUs' pending interrupts
after noirq suspend phase will be handled after system resume.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-06-07 16:11:35 -05:00
Anson Huang
bb2b2624db mailbox: imx: Add runtime PM callback to handle MU clocks
Some of i.MX8M SoCs have MU clock, they need to be managed in runtime
to make sure the MU clock can be off in runtime, add runtime PM callback
to handle MU clock.

And on i.MX8MP, the MU clock is combined with power domain and runtime
PM is enabled for the clock driver, during noirq suspend/resume phase,
runtime PM is disabled by device suspend, but the MU context save/restore
needs to enable MU clock for register access, calling clock prepare/enable
will trigger runtime resume failure and lead to system suspend failed.

Actually, the MU context save/restore is ONLY necessary for SCU IPC MU,
other MUs especially on i.MX8MP platforms which have MU clock assigned,
they need to runtime request/free mailbox channel in the consumer driver,
so no need to save/restore MU context for them, hence it can avoid this
issue, so the MU context save/restore is ONLY applied to i.MX platforms
MU instance without clock present.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-06-07 16:11:30 -05:00
Dong Aisheng
ba5f9fa0ca mailbox: imx: Add context save/restore for suspend/resume
For "mem" mode suspend on i.MX8 SoCs, MU settings could be
lost because its power is off, so save/restore is needed
for MU settings during suspend/resume. However, the restore
can ONLY be done when MU settings are actually lost, for the
scenario of settings NOT lost in "freeze" mode suspend, since
there could be still IPC going on multiple CPUs, restoring the
MU settings could overwrite the TIE by mistake and cause system
freeze, so need to make sure ONLY restore the MU settings when
it is powered off, Anson fixes this by checking whether restore
is actually needed when resume.

Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-06-07 16:11:24 -05:00
Manivannan Sadhasivam
fa74a0257f mailbox: Add support for Qualcomm IPCC
Add support for the Inter-Processor Communication Controller (IPCC)
block from Qualcomm that coordinates the interrupts (inbound & outbound)
for Multiprocessor (MPROC), COMPUTE-Level0 (COMPUTE-L0) & COMPUTE-Level1
(COMPUTE-L1) protocols for the Application Processor Subsystem (APSS).

This driver is modeled as an irqchip+mailbox driver. The irqchip part
helps in receiving the interrupts from the IPCC clients such as modems,
DSPs, PCI-E etc... and forwards them to respective entities in APSS.

On the other hand, the mailbox part is used to send interrupts to the IPCC
clients from the entities of APSS.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[mani: moved to mailbox, added static mbox channels and cleanups]
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 18:43:23 -05:00
Wei Yongjun
445aeeb569 mailbox: zynqmp-ipi: Fix NULL vs IS_ERR() check in zynqmp_ipi_mbox_probe()
In case of error, the function devm_ioremap() returns NULL pointer not
ERR_PTR(). So we should check whether the return value of devm_ioremap()
is NULL instead of IS_ERR.

Fixes: 4981b82ba2 ("mailbox: ZynqMP IPI mailbox controller")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 18:08:40 -05:00
Peng Fan
9d8ca628c0 mailbox: imx-mailbox: fix scu msg header size check
The i.MX8 SCU message header size is the number of "u32" elements,
not "u8", so fix the check.

Reported-by: coverity-bot <keescook+coverity-bot@chromium.org>
Addresses-Coverity-ID: 1461658 ("Memory - corruptions")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Acked-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 18:07:07 -05:00
Baolin Wang
ca27fc26cd mailbox: sprd: Add Spreadtrum mailbox driver
The Spreadtrum mailbox controller supports 8 channels to communicate
with MCUs, and it contains 2 different parts: inbox and outbox, which
are used to send and receive messages by IRQ mode.

Signed-off-by: Baolin Wang <baolin.wang@unisoc.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 18:05:33 -05:00
Markus Elfring
ec32481b16 mailbox: ZynqMP IPI: Delete an error message in zynqmp_ipi_probe()
The function platform_get_irq can log an error already.
Thus omit a redundant message for the exception handling in the
calling function.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 18:02:17 -05:00
Fabio Estevam
47303f9438 mailbox: imx: Disable the clock on devm_mbox_controller_register() failure
devm_mbox_controller_register() may fail, and in the case of failure the
priv->clk clock that was previously enabled, should be disabled.

Fixes: 2bb7005696 ("mailbox: Add support for i.MX messaging unit")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Oleksij Rempel <o.rempel@pengutronix.de>
[Jassi: fixed merge/am conflict]
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 17:58:39 -05:00
Dan Carpenter
1b3a347b7d mailbox: imx: Fix return in imx_mu_scu_xlate()
This called from mbox_request_channel().  The caller is  expecting error
pointers and not NULL so this "return NULL;" will lead to an Oops.

Fixes: 0a67003b19 ("mailbox: imx: add SCU MU support")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 16:07:51 -05:00
Anson Huang
676f23eab7 mailbox: imx: Support runtime PM
Some power hungry sub-systems like VPU has its own MUs which also
use mailbox driver, current mailbox driver uses platform driver
model and MU's power will be ON after driver probed and left ON
there, it may cause the whole sub-system can NOT enter lower power
mode, take VPU driver for example, it has runtime PM support, but
due to its MU always ON, the VPU sub-system will be always ON and
consume many power during kernel idle.

To save power in kernel idle, mailbox driver needs to support
runtime PM in order to power off MU when it is unused. However,
the runtime suspend/resume can ONLY be implemented in mailbox's
.shutdown/.startup callback, so its consumer needs to call
mbox_request_channel()/mbox_free_channel() in consumer driver's
runtime PM callback, then the MU's power will be ON/OFF along with
consumer's runtime PM status.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 16:07:19 -05:00
Jason Yan
00d9990acb mailbox: pcc: make pcc_mbox_driver static
Fix the following sparse warning:

drivers/mailbox/pcc.c:571:24: warning: symbol 'pcc_mbox_driver' was not
declared. Should it be static?

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-05-30 16:06:22 -05:00
Peng Fan
0a67003b19 mailbox: imx: add SCU MU support
i.MX8/8X SCU MU is dedicated for communication between SCU and Cortex-A
cores from hardware design, and could not be reused for other purpose.

Per i.MX8/8X Reference mannual, Chapter "12.9.2.3.2 Messaging Examples",
 Passing short messages: Transmit register(s) can be used to pass
 short messages from one to four words in length. For example, when
 a four-word message is desired, only one of the registers needs to
 have its corresponding interrupt enable bit set at the receiver side;
 the message’s first three words are written to the registers whose
 interrupt is masked, and the fourth word is written to the other
 register (which triggers an interrupt at the receiver side).

i.MX8/8X SCU firmware IPC is an implementation of passing short
messages. But current imx-mailbox driver only support one word
message, i.MX8/8X linux side firmware has to request four TX
and four RX to support IPC to SCU firmware. This is low efficent
and more interrupts triggered compared with one TX and
one RX.

To make SCU MU work,
  - parse the size of msg.
  - Only enable TR0/RR0 interrupt for transmit/receive message.
  - For TX/RX, only support one TX channel and one RX channel
  - For RX, support receive msg larger than 4 u32 words.
  - Support 6 channels, TX0/RX0/RXDB[0-3], not support TXDB.

Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:04:32 -05:00
Peng Fan
63b383575c mailbox: imx: restructure code to make easy for new MU
Add imx_mu_generic_tx for data send and imx_mu_generic_rx for interrupt
data receive.

Pack original mu chans related code into imx_mu_init_generic

Add tx/rx/init hooks into imx_mu_dcfg

With these, it will be a bit easy to introduce i.MX8/8X SCU type
MU dedicated to communicate with SCU.

Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:03:11 -05:00
Bibby Hsieh
c9ea564f3d mailbox: mediatek: remove implementation related to atomic_exec
After implement flush, client can flush the executing
command buffer or abort the still waiting for event
command buffer, so controller do not need to implement
atomic_exe feature. remove it.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:00:32 -05:00
Bibby Hsieh
b0524f7c96 mailbox: mediatek: implement flush function
For client driver which need to reorganize the command buffer, it could
use this function to flush the send command buffer.
If the channel doesn't be started (usually in waiting for event), this
function will abort it directly.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:00:32 -05:00
Rayagonda Kokatanur
64d0da512b maillbox: bcm-flexrm-mailbox: handle cmpl_pool dma allocation failure
Handle 'cmpl_pool' dma memory allocation failure.

Fixes: a9a9da47f8 ("mailbox: no need to check return value of debugfs_create functions")
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Tyler Hicks <tyhicks@linux.microsoft.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:00:32 -05:00
Samuel Holland
25831c44b0 mailbox: sun6i-msgbox: Add a new mailbox driver
Allwinner sun6i, sun8i, sun9i, and sun50i SoCs contain a hardware
message box used for communication between the ARM CPUs and the ARISC
management coprocessor. This mailbox contains 8 unidirectional
4-message FIFOs.

Add a driver for it, so it can be used with the Linux mailbox framework.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:00:32 -05:00
Takashi Iwai
38a5456a6d mailbox: bcm-pdc: Use scnprintf() for avoiding potential buffer overflow
Since snprintf() returns the would-be-output size instead of the
actual output size, the succeeding calls may go beyond the given
buffer limit.  Fix it by replacing with scnprintf().

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:00:32 -05:00
Tang Bin
223a83bdcc mailbox:armada-37xx-rwtm:remove duplicate print in armada_37xx_mbox_probe()
In this function,we don't need dev_err() message because when something
goes wrong,platform_get_irq() and devm_platform_ioremap_resource() have
print an error message itself, so we should remove duplicate dev_err().

Signed-off-by: Tang Bin <tangbin@cmss.chinamobile.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2020-03-19 23:00:32 -05:00
Yangtao Li
34efc83727 mailbox: armada-37xx-rwtm: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.

Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-01-08 10:41:52 +01:00
Linus Torvalds
43fd4bd72c mailbox changes for v5.5
- omap : misc - catch error returned from pm_runtime_put_sync
 - hisi : misc - drop .owner from platform_driver
 - stm : change how wakeup is handled
 - imx : fix - bailout on error and nuke correct irq
 - imx : add support for imx7ulp platform
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Merge tag 'mailbox-v5.5' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - omap : misc - catch error returned from pm_runtime_put_sync

 - hisi : misc - drop .owner from platform_driver

 - stm : change how wakeup is handled

 - imx : fix - bailout on error and nuke correct irq

 - imx : add support for imx7ulp platform

* tag 'mailbox-v5.5' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: imx: add support for imx v1 mu
  dt-bindings: mailbox: imx-mu: add imx7ulp MU support
  mailbox: imx: Clear the right interrupts at shutdown
  mailbox: imx: Fix Tx doorbell shutdown path
  mailbox: stm32-ipcc: Update wakeup management
  mailbox: no need to set .owner platform_driver_register
  mailbox/omap: Handle if CONFIG_PM is disabled
2019-12-01 18:42:02 -08:00
Richard Zhu
c6c6bc6ea9 mailbox: imx: add support for imx v1 mu
There is a version 1.0 MU on i.MX7ULP platform.
One new version ID register is added, and it's offset is 0.
TRn registers are defined at the offset 0x20 ~ 0x2C.
RRn registers are defined at the offset 0x40 ~ 0x4C.
SR/CR registers are defined at 0x60/0x64.
Extend this driver to support it.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Suggested-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-11-30 23:09:14 -06:00
Daniel Baluta
5f0af07e89 mailbox: imx: Clear the right interrupts at shutdown
Make sure to only clear enabled interrupts keeping count
of the connection type.

Suggested-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-11-30 23:09:10 -06:00
Daniel Baluta
bf159d151a mailbox: imx: Fix Tx doorbell shutdown path
Tx doorbell is handled by txdb_tasklet and doesn't
have an associated IRQ.

Anyhow, imx_mu_shutdown ignores this and tries to
free an IRQ that wasn't requested for Tx DB resulting
in the following warning:

[    1.967644] Trying to free already-free IRQ 26
[    1.972108] WARNING: CPU: 2 PID: 157 at kernel/irq/manage.c:1708 __free_irq+0xc0/0x358
[    1.980024] Modules linked in:
[    1.983088] CPU: 2 PID: 157 Comm: kworker/2:1 Tainted: G
[    1.993524] Hardware name: Freescale i.MX8QXP MEK (DT)
[    1.998668] Workqueue: events deferred_probe_work_func
[    2.003812] pstate: 60000085 (nZCv daIf -PAN -UAO)
[    2.008607] pc : __free_irq+0xc0/0x358
[    2.012364] lr : __free_irq+0xc0/0x358
[    2.016111] sp : ffff00001179b7e0
[    2.019422] x29: ffff00001179b7e0 x28: 0000000000000018
[    2.024736] x27: ffff000011233000 x26: 0000000000000004
[    2.030053] x25: 000000000000001a x24: ffff80083bec74d4
[    2.035369] x23: 0000000000000000 x22: ffff80083bec7588
[    2.040686] x21: ffff80083b1fe8d8 x20: ffff80083bec7400
[    2.046003] x19: 0000000000000000 x18: ffffffffffffffff
[    2.051320] x17: 0000000000000000 x16: 0000000000000000
[    2.056637] x15: ffff0000111296c8 x14: ffff00009179b517
[    2.061953] x13: ffff00001179b525 x12: ffff000011142000
[    2.067270] x11: ffff000011129f20 x10: ffff0000105da970
[    2.072587] x9 : 00000000ffffffd0 x8 : 0000000000000194
[    2.077903] x7 : 612065657266206f x6 : ffff0000111e7b09
[    2.083220] x5 : 0000000000000003 x4 : 0000000000000000
[    2.088537] x3 : 0000000000000000 x2 : 00000000ffffffff
[    2.093854] x1 : 28b70f0a2b60a500 x0 : 0000000000000000
[    2.099173] Call trace:
[    2.101618]  __free_irq+0xc0/0x358
[    2.105021]  free_irq+0x38/0x98
[    2.108170]  imx_mu_shutdown+0x90/0xb0
[    2.111921]  mbox_free_channel.part.2+0x24/0xb8
[    2.116453]  mbox_free_channel+0x18/0x28

This bug is present from the beginning of times.

Cc: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-11-30 23:09:07 -06:00
Fabien Dessenne
69269446cc mailbox: stm32-ipcc: Update wakeup management
The wakeup specific IRQ management is no more needed to wake up the
stm32 platform. A relationship has been established between the EXTI and
the RX IRQ, just need to declare the EXTI interrupt instead of the
IPCC RX IRQ.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-11-30 23:08:59 -06:00
Tian Tao
41c9479903 mailbox: no need to set .owner platform_driver_register
the platform_driver_register will set the .owner to THIS_MODULE

Signed-off-by: Tian Tao <tiantao6@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-11-26 22:45:15 -06:00
Brandon Maier
0434d3f452 mailbox/omap: Handle if CONFIG_PM is disabled
If CONFIG_PM is disabled, pm_runtime_put_sync() returns -ENOSYS.

Signed-off-by: Brandon Maier <brandon.maier@rockwellcollins.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-11-26 22:44:53 -06:00
Jon Hunter
c745da8d43 mailbox: tegra: Fix superfluous IRQ error message
Commit 7723f4c5ec ("driver core: platform: Add an error message to
platform_get_irq*()") added an error message to avoid drivers having
to print an error message when IRQ lookup fails. However, there are
some cases where IRQs are optional and so new optional versions of
the platform_get_irq*() APIs have been added for these cases.

The IRQs for Tegra HSP module are optional because not all instances
of the module have the doorbell and all of the shared interrupts.
Hence, since the above commit was applied the following error messages
are now seen on Tegra194 ...

 ERR KERN tegra-hsp c150000.hsp: IRQ doorbell not found
 ERR KERN tegra-hsp c150000.hsp: IRQ shared0 not found

The Tegra HSP driver deliberately does not fail if these are not found
and so fix the above errors by updating the Tegra HSP driver to use
the platform_get_irq_byname_optional() API.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20191011083459.11551-1-jonathanh@nvidia.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-11-12 15:09:19 +01:00
Jorge Ramirez-Ortiz
556a0964e2 mailbox: qcom-apcs: fix max_register value
The mailbox length is 0x1000 hence the max_register value is 0xFFC.

Fixes: c6a8b171ca ("mailbox: qcom: Convert APCS IPC driver to use
regmap")
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:54:29 -05:00
Gokul Sriram Palanisamy
88ae25e46c mailbox: qcom: Add support for IPQ8074 APCS
Add support of IPQ8074 with IPC register offset as 8.

Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:53:35 -05:00
Sibi Sankar
08a81d3ac8 mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs
Add the corresponding APSS shared offset for SM8150 and SC7180 SoCs.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:46:24 -05:00
Jorge Ramirez-Ortiz
16d52f336b mbox: qcom: replace integer with valid macro
Use the correct macro when registering the platform device.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:46:05 -05:00
Jorge Ramirez-Ortiz
78c86458a4 mbox: qcom: add APCS child device for QCS404
There is clock controller functionality in the APCS hardware block of
qcs404 devices similar to msm8916.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:46:00 -05:00
Bibby Hsieh
6058f11870 mailbox: mediatek: cmdq: clear the event in cmdq initial flow
GCE hardware stored event information in own internal sysram,
if the initial value in those sysram is not zero value
it will cause a situation that gce can wait the event immediately
after client ask gce to wait event but not really trigger the
corresponding hardware.

In order to make sure that the wait event function is
exactly correct, we need to clear the sysram value in
cmdq initial flow.

Fixes: 623a6143a8 ("mailbox: mediatek: Add Mediatek CMDQ driver")

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:40:05 -05:00
Bibby Hsieh
286358c444 mailbox: mediatek: cmdq: support mt8183 gce function
add mt8183 compatible name for supporting gce function

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:40:05 -05:00
Bibby Hsieh
2c49e4e846 mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data
The interrupt mask and thread number has positive correlation,
so we move the CMDQ_IRQ_MASK into cmdq driver data and calculate
it by thread number.

Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:40:05 -05:00
Chuhong Yuan
2b983d124a mailbox: armada-37xx-rwtm: Use device-managed registration API
Use devm_mbox_controller_register to get rid of
redundant remove function.

Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-09-17 00:38:43 -05:00
Linus Torvalds
fde7dc63b1 - stm32: race fix by adding a spinlock
- mhu: trim included headers
 - omap: add support for K3 SoCs
 - imx: Irq disable fix
 - bcm: tidy up extracting driver data
 - tegra: make resume 'noirq'
 - api: fix error handling
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Merge tag 'mailbox-v5.3' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - stm32: race fix by adding a spinlock

 - mhu: trim included headers

 - omap: add support for K3 SoCs

 - imx: Irq disable fix

 - bcm: tidy up extracting driver data

 - tegra: make resume 'noirq'

 - api: fix error handling

* tag 'mailbox-v5.3' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: handle failed named mailbox channel request
  mailbox: tegra: avoid resume NULL mailboxes
  mailbox: tegra: hsp: add noirq resume
  mailbox: bcm-flexrm-mailbox: using dev_get_drvdata directly
  mailbox: imx: Clear GIEn bit at shutdown
  mailbox: omap: Add support for TI K3 SoCs
  dt-bindings: mailbox: omap: Update bindings for TI K3 SoCs
  mailbox: arm_mhu: reorder header inclusion and drop unneeded ones
  mailbox: stm32_ipcc: add spinlock to fix channels concurrent access
2019-07-14 16:36:51 -07:00
Linus Torvalds
f632a8170a Driver Core and debugfs changes for 5.3-rc1
Here is the "big" driver core and debugfs changes for 5.3-rc1
 
 It's a lot of different patches, all across the tree due to some api
 changes and lots of debugfs cleanups.  Because of this, there is going
 to be some merge issues with your tree at the moment, I'll follow up
 with the expected resolutions to make it easier for you.
 
 Other than the debugfs cleanups, in this set of changes we have:
 	- bus iteration function cleanups (will cause build warnings
 	  with s390 and coresight drivers in your tree)
 	- scripts/get_abi.pl tool to display and parse Documentation/ABI
 	  entries in a simple way
 	- cleanups to Documenatation/ABI/ entries to make them parse
 	  easier due to typos and other minor things
 	- default_attrs use for some ktype users
 	- driver model documentation file conversions to .rst
 	- compressed firmware file loading
 	- deferred probe fixes
 
 All of these have been in linux-next for a while, with a bunch of merge
 issues that Stephen has been patient with me for.  Other than the merge
 issues, functionality is working properly in linux-next :)
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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 =XrEZ
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Merge tag 'driver-core-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core and debugfs updates from Greg KH:
 "Here is the "big" driver core and debugfs changes for 5.3-rc1

  It's a lot of different patches, all across the tree due to some api
  changes and lots of debugfs cleanups.

  Other than the debugfs cleanups, in this set of changes we have:

   - bus iteration function cleanups

   - scripts/get_abi.pl tool to display and parse Documentation/ABI
     entries in a simple way

   - cleanups to Documenatation/ABI/ entries to make them parse easier
     due to typos and other minor things

   - default_attrs use for some ktype users

   - driver model documentation file conversions to .rst

   - compressed firmware file loading

   - deferred probe fixes

  All of these have been in linux-next for a while, with a bunch of
  merge issues that Stephen has been patient with me for"

* tag 'driver-core-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (102 commits)
  debugfs: make error message a bit more verbose
  orangefs: fix build warning from debugfs cleanup patch
  ubifs: fix build warning after debugfs cleanup patch
  driver: core: Allow subsystems to continue deferring probe
  drivers: base: cacheinfo: Ensure cpu hotplug work is done before Intel RDT
  arch_topology: Remove error messages on out-of-memory conditions
  lib: notifier-error-inject: no need to check return value of debugfs_create functions
  swiotlb: no need to check return value of debugfs_create functions
  ceph: no need to check return value of debugfs_create functions
  sunrpc: no need to check return value of debugfs_create functions
  ubifs: no need to check return value of debugfs_create functions
  orangefs: no need to check return value of debugfs_create functions
  nfsd: no need to check return value of debugfs_create functions
  lib: 842: no need to check return value of debugfs_create functions
  debugfs: provide pr_fmt() macro
  debugfs: log errors when something goes wrong
  drivers: s390/cio: Fix compilation warning about const qualifiers
  drivers: Add generic helper to match by of_node
  driver_find_device: Unify the match function with class_find_device()
  bus_find_device: Unify the match callback with class_find_device
  ...
2019-07-12 12:24:03 -07:00
morten petersen
25777e5784 mailbox: handle failed named mailbox channel request
Previously, if mbox_request_channel_byname was used with a name
which did not exist in the "mbox-names" property of a mailbox
client, the mailbox corresponding to the last entry in the
"mbox-names" list would be incorrectly selected.
With this patch, -EINVAL is returned if the named mailbox is
not found.

Signed-off-by: Morten Borup Petersen <morten_bp@live.dk>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-11 10:19:00 -05:00
Bitan Biswas
20b5d24c76 mailbox: tegra: avoid resume NULL mailboxes
If Tegra HSP device tree does not have 'shared irqs',
mailboxes pointer is NULL. Add non-NULL HSP mailboxes
check in resume callback before tegra_hsp_mailbox_startup()
call and prevent NULL pointer exception.

Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-10 23:08:44 -05:00
Bitan Biswas
b1a399530c mailbox: tegra: hsp: add noirq resume
Add noirq resume instead of resume callback for Tegra HSP. Tegra HSP
resume needs tegra_hsp_doorbell_startup() call to fix timeout error for
tegra_bpmp_transfer() during genpd resume noirq on Jetson TX2.

Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-10 23:08:44 -05:00
Fuqian Huang
7836922d87 mailbox: bcm-flexrm-mailbox: using dev_get_drvdata directly
Several drivers cast a struct device pointer to a struct
platform_device pointer only to then call platform_get_drvdata().
To improve readability, these constructs can be simplified
by using dev_get_drvdata() directly.

Signed-off-by: Fuqian Huang <huangfq.daxian@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-10 23:08:44 -05:00
Daniel Baluta
11108f4671 mailbox: imx: Clear GIEn bit at shutdown
GIEn is enabled at startup for RX doorbell mailboxes so
we need to clear the bit at shutdown in order to avoid
leaving the interrupt line enabled.

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-10 23:08:44 -05:00
Suman Anna
9c1f2a5dc2 mailbox: omap: Add support for TI K3 SoCs
The TI K3 AM65x and J721E family of SoCs have a new Mailbox IP that
is based on the existing Mailbox IP present in OMAP architecture based
SoCs. Each instance of the legacy OMAP Mailbox IP is now a single cluster
within the newer Mailbox IP instance on K3 architecture based SoCs. A
single K3 Mailbox IP instance has multiple clusters with each cluster
providing the same functionality as the existing OMAP Mailbox IP.

Reuse the existing OMAP Mailbox driver to extend the support for this
newer IP present within the Main NavSS block on K3 SoCs. The K3 family
of SoCs use 64-bit ARMv8 processors for running Linux, so the driver is
also enhanced to deal with the differences between the 32-bit message
payloads and the 64-bit pointers used by the client drivers.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-10 23:08:44 -05:00
Sudeep Holla
06c182c3bc mailbox: arm_mhu: reorder header inclusion and drop unneeded ones
This patch just re-orders some of the headers includes and also drop
the ones that are unnecessary.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-10 23:08:43 -05:00
Arnaud Pouliquen
dba9a3dfe9 mailbox: stm32_ipcc: add spinlock to fix channels concurrent access
Add spinlock protection on IPCC register update to avoid race condition.
Without this fix, stm32_ipcc_set_bits and stm32_ipcc_clr_bits can be
called in parallel for different channels. This results in register
corruptions.

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-07-10 23:08:43 -05:00
Thomas Gleixner
d2912cb15b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:55 +02:00
Thomas Gleixner
cb849fc5f0 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 459
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation the gpl this program is
  distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  version 2 gplv2 for more details you should have received a copy of
  the gnu general public license version 2 gplv2 along with this
  source code

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 16 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081201.771169395@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-19 17:09:09 +02:00
Thomas Gleixner
2025cf9e19 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 263 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Thomas Gleixner
8e8e69d67e treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation version 2 of the license this program
  is distributed in the hope that it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 100 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.918357685@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Thomas Gleixner
97fb5e8d9b treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 and
  only version 2 as published by the free software foundation this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 294 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00
Greg Kroah-Hartman
a9a9da47f8 mailbox: no need to check return value of debugfs_create functions
When calling debugfs functions, there is no need to ever check the
return value.  The function can work or not, but the code logic should
never do something different based on this.

Cc: Jassi Brar <jassisinghbrar@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-03 16:18:12 +02:00
Thomas Gleixner
9952f6918d treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation this program
  is distributed in the hope it will be useful but without any
  warranty without even the implied warranty of merchantability or
  fitness for a particular purpose see the gnu general public license
  for more details you should have received a copy of the gnu general
  public license along with this program if not see http www gnu org
  licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 228 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:29:52 -07:00
Thomas Gleixner
c942fddf87 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
Based on 3 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [kishon] [vijay] [abraham]
  [i] [kishon]@[ti] [com] this program is distributed in the hope that
  it will be useful but without any warranty without even the implied
  warranty of merchantability or fitness for a particular purpose see
  the gnu general public license for more details

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version [author] [graeme] [gregory]
  [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i]
  [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema]
  [hk] [hemahk]@[ti] [com] this program is distributed in the hope
  that it will be useful but without any warranty without even the
  implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1105 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Reviewed-by: Richard Fontana <rfontana@redhat.com>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:37 -07:00
Thomas Gleixner
2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Thomas Gleixner
1ccea77e2a treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not see http www gnu org licenses

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details [based]
  [from] [clk] [highbank] [c] you should have received a copy of the
  gnu general public license along with this program if not see http
  www gnu org licenses

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 355 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com>
Reviewed-by: Steve Winslow <swinslow@gmail.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190519154041.837383322@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 11:28:45 +02:00
Thomas Gleixner
ec8f24b7fa treewide: Add SPDX license identifier - Makefile/Kconfig
Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-21 10:50:46 +02:00
Linus Torvalds
815d469d8c One more patch to remove io.h from clk-provider.h. We used to need this
include when we had clk_readl() and clk_writel(), but those are gone now
 so this patch pushes the dependency out to the users of clk-provider.h.
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull more clk framework updates from Stephen Boyd:
 "One more patch to remove io.h from clk-provider.h.

  We used to need this include when we had clk_readl() and clk_writel(),
  but those are gone now so this patch pushes the dependency out to the
  users of clk-provider.h"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: Remove io.h from clk-provider.h
2019-05-16 19:05:35 -07:00
Stephen Boyd
62e59c4e69 clk: Remove io.h from clk-provider.h
Now that we've gotten rid of clk_readl() we can remove io.h from the
clk-provider header and push out the io.h include to any code that isn't
already including the io.h header but using things like readl/writel,
etc.

Found with this grep:

  git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \
  	xargs git grep -l \
	-e '\<__iowrite32_copy\>' --or \
	-e '\<__ioread32_copy\>' --or \
	-e '\<__iowrite64_copy\>' --or \
	-e '\<ioremap_page_range\>' --or \
	-e '\<ioremap_huge_init\>' --or \
	-e '\<arch_ioremap_pud_supported\>' --or \
	-e '\<arch_ioremap_pmd_supported\>' --or \
	-e '\<devm_ioport_map\>' --or \
	-e '\<devm_ioport_unmap\>' --or \
	-e '\<IOMEM_ERR_PTR\>' --or \
	-e '\<devm_ioremap\>' --or \
	-e '\<devm_ioremap_nocache\>' --or \
	-e '\<devm_ioremap_wc\>' --or \
	-e '\<devm_iounmap\>' --or \
	-e '\<devm_ioremap_release\>' --or \
	-e '\<devm_memremap\>' --or \
	-e '\<devm_memunmap\>' --or \
	-e '\<__devm_memremap_pages\>' --or \
	-e '\<pci_remap_cfgspace\>' --or \
	-e '\<arch_has_dev_port\>' --or \
	-e '\<arch_phys_wc_add\>' --or \
	-e '\<arch_phys_wc_del\>' --or \
	-e '\<memremap\>' --or \
	-e '\<memunmap\>' --or \
	-e '\<arch_io_reserve_memtype_wc\>' --or \
	-e '\<arch_io_free_memtype_wc\>' --or \
	-e '\<__io_aw\>' --or \
	-e '\<__io_pbw\>' --or \
	-e '\<__io_paw\>' --or \
	-e '\<__io_pbr\>' --or \
	-e '\<__io_par\>' --or \
	-e '\<__raw_readb\>' --or \
	-e '\<__raw_readw\>' --or \
	-e '\<__raw_readl\>' --or \
	-e '\<__raw_readq\>' --or \
	-e '\<__raw_writeb\>' --or \
	-e '\<__raw_writew\>' --or \
	-e '\<__raw_writel\>' --or \
	-e '\<__raw_writeq\>' --or \
	-e '\<readb\>' --or \
	-e '\<readw\>' --or \
	-e '\<readl\>' --or \
	-e '\<readq\>' --or \
	-e '\<writeb\>' --or \
	-e '\<writew\>' --or \
	-e '\<writel\>' --or \
	-e '\<writeq\>' --or \
	-e '\<readb_relaxed\>' --or \
	-e '\<readw_relaxed\>' --or \
	-e '\<readl_relaxed\>' --or \
	-e '\<readq_relaxed\>' --or \
	-e '\<writeb_relaxed\>' --or \
	-e '\<writew_relaxed\>' --or \
	-e '\<writel_relaxed\>' --or \
	-e '\<writeq_relaxed\>' --or \
	-e '\<readsb\>' --or \
	-e '\<readsw\>' --or \
	-e '\<readsl\>' --or \
	-e '\<readsq\>' --or \
	-e '\<writesb\>' --or \
	-e '\<writesw\>' --or \
	-e '\<writesl\>' --or \
	-e '\<writesq\>' --or \
	-e '\<inb\>' --or \
	-e '\<inw\>' --or \
	-e '\<inl\>' --or \
	-e '\<outb\>' --or \
	-e '\<outw\>' --or \
	-e '\<outl\>' --or \
	-e '\<inb_p\>' --or \
	-e '\<inw_p\>' --or \
	-e '\<inl_p\>' --or \
	-e '\<outb_p\>' --or \
	-e '\<outw_p\>' --or \
	-e '\<outl_p\>' --or \
	-e '\<insb\>' --or \
	-e '\<insw\>' --or \
	-e '\<insl\>' --or \
	-e '\<outsb\>' --or \
	-e '\<outsw\>' --or \
	-e '\<outsl\>' --or \
	-e '\<insb_p\>' --or \
	-e '\<insw_p\>' --or \
	-e '\<insl_p\>' --or \
	-e '\<outsb_p\>' --or \
	-e '\<outsw_p\>' --or \
	-e '\<outsl_p\>' --or \
	-e '\<ioread8\>' --or \
	-e '\<ioread16\>' --or \
	-e '\<ioread32\>' --or \
	-e '\<ioread64\>' --or \
	-e '\<iowrite8\>' --or \
	-e '\<iowrite16\>' --or \
	-e '\<iowrite32\>' --or \
	-e '\<iowrite64\>' --or \
	-e '\<ioread16be\>' --or \
	-e '\<ioread32be\>' --or \
	-e '\<ioread64be\>' --or \
	-e '\<iowrite16be\>' --or \
	-e '\<iowrite32be\>' --or \
	-e '\<iowrite64be\>' --or \
	-e '\<ioread8_rep\>' --or \
	-e '\<ioread16_rep\>' --or \
	-e '\<ioread32_rep\>' --or \
	-e '\<ioread64_rep\>' --or \
	-e '\<iowrite8_rep\>' --or \
	-e '\<iowrite16_rep\>' --or \
	-e '\<iowrite32_rep\>' --or \
	-e '\<iowrite64_rep\>' --or \
	-e '\<__io_virt\>' --or \
	-e '\<pci_iounmap\>' --or \
	-e '\<virt_to_phys\>' --or \
	-e '\<phys_to_virt\>' --or \
	-e '\<ioremap_uc\>' --or \
	-e '\<ioremap\>' --or \
	-e '\<__ioremap\>' --or \
	-e '\<iounmap\>' --or \
	-e '\<ioremap\>' --or \
	-e '\<ioremap_nocache\>' --or \
	-e '\<ioremap_uc\>' --or \
	-e '\<ioremap_wc\>' --or \
	-e '\<ioremap_wc\>' --or \
	-e '\<ioremap_wt\>' --or \
	-e '\<ioport_map\>' --or \
	-e '\<ioport_unmap\>' --or \
	-e '\<ioport_map\>' --or \
	-e '\<ioport_unmap\>' --or \
	-e '\<xlate_dev_kmem_ptr\>' --or \
	-e '\<xlate_dev_mem_ptr\>' --or \
	-e '\<unxlate_dev_mem_ptr\>' --or \
	-e '\<virt_to_bus\>' --or \
	-e '\<bus_to_virt\>' --or \
	-e '\<memset_io\>' --or \
	-e '\<memcpy_fromio\>' --or \
	-e '\<memcpy_toio\>'

I also reordered a couple includes when they weren't alphabetical and
removed clk.h from kona, replacing it with clk-provider.h because
that driver doesn't use clk consumer APIs.

Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-05-15 13:21:37 -07:00
Linus Torvalds
15500c0a50 - New driver: Armada 37xx mailbox controller
- Misc: Use devm_ api for imx and platform_get_irq for stm32
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Merge tag 'mailbox-v5.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - New driver: Armada 37xx mailbox controller

 - Misc: Use devm_ api for imx and platform_get_irq for stm32

* tag 'mailbox-v5.2' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Add support for Armada 37xx rWTM mailbox
  dt-bindings: mailbox: Document armada-3700-rwtm-mailbox binding
  mailbox: stm32-ipcc: check invalid irq
  mailbox: imx: use devm_platform_ioremap_resource() to simplify code
2019-05-10 12:55:16 -04:00
Marek Behun
8fbbfd966e mailbox: Add support for Armada 37xx rWTM mailbox
This adds support for the mailbox via which the kernel can communicate
with the firmware running on the secure processor of the Armada 37xx
SOC.

The rWTM secure processor has access to internal eFuses and
cryptographic circuits, such as the Entropy Bit Generator to generate
true random numbers.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-05-09 00:41:00 -05:00
Fabien Dessenne
68a1c8485c mailbox: stm32-ipcc: check invalid irq
On failure of_irq_get() returns a negative value or zero, which is
not handled as an error in the existing implementation.
Instead of using this API, use platform_get_irq() that returns
exclusively a negative value on failure.
Also, do not output an error log in case of defer probe error.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-05-09 00:41:00 -05:00
Anson Huang
0c40e631cd mailbox: imx: use devm_platform_ioremap_resource() to simplify code
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Mukesh Ojha <mojha@codeaurora.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-05-09 00:40:49 -05:00
Keith Busch
60574d1e05 acpi: Create subtable parsing infrastructure
Parsing entries in an ACPI table had assumed a generic header
structure. There is no standard ACPI header, though, so less common
layouts with different field sizes required custom parsers to go through
their subtable entry list.

Create the infrastructure for adding different table types so parsing
the entries array may be more reused for all ACPI system tables and
the common code doesn't need to be duplicated.

Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Tested-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Keith Busch <keith.busch@intel.com>
Tested-by: Brice Goglin <Brice.Goglin@inria.fr>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-04 18:41:12 +02:00
Anson Huang
17b860bbfc mailbox: imx: keep MU irq working during suspend/resume
During noirq suspend phase, mailbox MU irq will be masked
but many drivers still need to communicate with system
controller firmware via mailbox, if MU irq is masked, it
will cause RPC timeout as below:

[   23.372103] imx-scu scu: RPC send msg timeout

Setting MU irq to be wakeup source is NOT working as GIC
driver does NOT have .irq_set_wake implemented, so to
support suspend/resume, just make imx mailbox driver NOT
suspend, since MU is always a wakeup source on i.MX platforms
with system controller inside, and its power/clock is
maintained by system controller, mailbox driver no need
to manage them.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-03-11 02:51:43 -05:00
Wendy Liang
4981b82ba2 mailbox: ZynqMP IPI mailbox controller
This patch is to introduce ZynqMP IPI mailbox controller driver
to use the ZynqMP IPI block as mailboxes.

Signed-off-by: Wendy Liang <wendy.liang@xilinx.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-03-06 20:34:20 -06:00
Fabien Dessenne
419d67f3ec mailbox: stm32-ipcc: remove useless device_init_wakeup call
If the "wakeup-source" property does not exist there is no need to call
device_init_wakeup("false") at probe.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-03-06 20:33:59 -06:00
Fabien Dessenne
eac36c8651 mailbox: stm32-ipcc: do not enable wakeup source by default
By default do not enable the wakeup source.
This lets the userspace application decide whether the wakeup source
shall be enabled or not.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-03-06 20:33:52 -06:00
Fabien Dessenne
6899b4f7c9 mailbox: mailbox-test: fix null pointer if no mmio
Fix null pointer issue if resource_size is called with no ioresource.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-03-06 20:33:14 -06:00
Fabien Dessenne
10cfc5a92e mailbox: mailbox-test: fix debugfs in multi-instances
Create one debug entry directory per instance to support the multi
instantiation.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-03-06 20:32:59 -06:00
Arnd Bergmann
a904327e98 mailbox: tegra-hsp: mark suspend function as __maybe_unused
We get a warning about this being unused when CONFIG_PM is disabled:

drivers/mailbox/tegra-hsp.c:782:12: error: 'tegra_hsp_resume' defined but not used [-Werror=unused-function]

Fixes: 9a63f0f405 ("mailbox: tegra-hsp: Add suspend/resume support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-03-06 20:31:03 -06:00
Rayagonda Kokatanur
d7bf31a0f8 mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush timeout issue
RING_CONTROL reg was not written due to wrong address, hence all
the subsequent ring flush was timing out.

Fixes: a371c10ea4 ("mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence")

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-02-18 10:40:58 -06:00
Thierry Reding
4f0557795e mailbox: Export mbox_flush()
The mbox_flush() function can be used by drivers that are built as
modules, so the function needs to be exported.

Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2019-02-18 10:39:17 -06:00
Thierry Reding
d69e11648e mailbox: tegra-hsp: Use device-managed registration API
In order to get rid of a lot of cleanup boilerplate code, use the
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 22:31:26 -06:00
Bartosz Golaszewski
a54d03ed01 mailbox: tegra-hsp: use devm_kstrdup_const()
Use devm_kstrdup_const() in the tegra-hsp driver. This mostly serves as
an example of how to use this new routine to shrink driver code.

Also use devm_kzalloc() instead of regular kzalloc() to shrink the
driver even more.

Doorbell objects are only removed in the driver's remove callback so
it's safe to convert all memory allocations to devres.

Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 22:31:26 -06:00
Thierry Reding
9a63f0f405 mailbox: tegra-hsp: Add suspend/resume support
Upon resuming from a system sleep state, the interrupts for all active
shared mailboxes need to be reenabled, otherwise they will not work.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 22:31:26 -06:00
Thierry Reding
91b1b1c3da mailbox: tegra-hsp: Add support for shared mailboxes
The Tegra HSP block supports 'shared mailboxes' that are simple 32-bit
registers consisting of a FULL bit in MSB position and 31 bits of data.
The hardware can be configured to trigger interrupts when a mailbox
is empty or full. Add support for these shared mailboxes to the HSP
driver.

The initial use for the mailboxes is the Tegra Combined UART. For this
purpose, we use interrupts to receive data, and spinning to wait for
the transmit mailbox to be emptied to minimize unnecessary overhead.

Based on work by Mikko Perttunen <mperttunen@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 22:31:26 -06:00
Mikko Perttunen
8ed82e2387 mailbox: Allow multiple controllers per device
Look through the whole controller list when mapping device tree
phandles to controllers instead of stopping at the first one.

Each controller is intended to only contain one kind of mailbox,
but some devices (like Tegra HSP) implement multiple kinds and use
the same device tree node for all of them. As such, we need to allow
multiple mbox_controllers per device tree node.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 22:31:26 -06:00
Thierry Reding
a8803d7421 mailbox: Support blocking transfers in atomic context
The mailbox framework supports blocking transfers via completions for
clients that can sleep. In order to support blocking transfers in cases
where the transmission is not permitted to sleep, add a new ->flush()
callback that controller drivers can implement to busy loop until the
transmission has been completed. A new mbox_flush() function can be
called by mailbox consumers in atomic context to make sure a transfer
has completed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 22:31:26 -06:00
Thierry Reding
2298a6f09f mailbox: ti-msgmgr: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:26 -06:00
Thierry Reding
368d7767b5 mailbox: stm32-ipcc: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:26 -06:00
Thierry Reding
08f2f88a3b mailbox: rockchip: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
83dd44a17d mailbox: qcom-apcs: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
85a555246e mailbox: platform-mhu: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
a3abf4363c mailbox: omap: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
ec1c674f0a mailbox: mtk-cmdq: Remove needless devm_kfree() calls
Memory allocated through device-managed functions doesn't need to be
explicitly freed, so these calls can be removed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
8aed571955 mailbox: mtk-cmdq: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
0b7f5fe837 mailbox: xgene-slimpro: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
d0c196dbee mailbox: sti: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
87f63f578b mailbox: altera: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
4013286c72 mailbox: imx: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
ad3e7f9651 mailbox: hi6220: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
e73cb83c80 mailbox: hi3660: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Tested-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
6267ee6afa mailbox: bcm-pdc: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
0cafc12ab9 mailbox: bcm-flexrm: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
709cbeea1b mailbox: bcm2835: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
6aba2f4aac mailbox: arm-mhu: Use device-managed registration API
Get rid of some boilerplate driver removal code by using the newly added
device-managed registration API.

Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Thierry Reding
e898d9cdd3 mailbox: Add device-managed registration functions
Add device-managed equivalents of the mbox_controller_register() and
mbox_controller_unregister() functions that can be used to have the
devres infrastructure automatically unregister mailbox controllers on
driver probe failure or driver removal. This can help remove a lot of
boiler plate code from drivers.

Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-21 16:49:25 -06:00
Stefan Wahren
e2affdbef2 mailbox: bcm2835: Switch to SPDX identifier
Adopt the SPDX license identifier headers to ease license compliance
management.

Cc: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Acked-by: Lubomir Rintel <lkundrak@v3.sk>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-12 08:22:54 +05:30
Dan Carpenter
78f3ff524f mailbox: ti-msgmgr: Off by one in ti_msgmgr_of_xlate()
The > comparison should be >= or we access one element beyond the end
of the array.

(The inst->qinsts[] array is allocated in the ti_msgmgr_probe() function
and it has ->num_valid_queues elements.)

Fixes: a2b79838b8 ("mailbox: ti-msgmgr: Add support for Secure Proxy")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-12 08:02:45 +05:30
Kevin Wangtao
2e4ac7cc49 mailbox: Hi3660: Fixup mailbox state machine malfunction issue
Current mailbox driver of Hi3660 release the mailbox directly
before sending a new message which may cause last message lost
and next message sending doesn't take effect actually.

This patch fixs this issue by following the right progress below,
each time before sending a message, mailbox driver will check
whether the mailbox is in ready state, if last message has been
acknowledged, the mailbox driver will clear the ack state to turn
the mailbox to ready state again.

Signed-off-by: Kevin Wangtao <kevin.wangtao@hisilicon.com>
Reviewed-and-tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Valentin Schneider <valentin.schneider@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-12 08:01:10 +05:30
Julia Lawall
b5452838c6 mailbox: hi3660: constify mbox_chan_ops structure
The mbox_chan_ops structure can be const as it is only stored in the
ops field of an mbox_controller structure and this field is const.

Done with the help of Coccinelle.

Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-12-12 07:59:40 +05:30
Linus Torvalds
fe675d4d3c - Convert print users to use the %pOFn format specifier
- Enable ti-msgmr driver for the K3 platform as well
 - Add QCS404 to compatible list of QCOM's APCS IPC driver
 - Minor spelling fixes toogle -> toggle
 - kzalloc failure catch in Mediatek driver
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Merge tag 'mailbox-v4.20' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - convert print users to use the %pOFn format specifier

 - enable ti-msgmr driver for the K3 platform as well

 - add QCS404 to compatible list of QCOM's APCS IPC driver

 - minor spelling fixes toogle -> toggle

 - kzalloc failure catch in Mediatek driver

* tag 'mailbox-v4.20' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: mediatek: Add check for possible failure of kzalloc
  mailbox: bcm-flexrm-mailbox: fix spelling mistake "toogle" -> "toggle"
  mailbox: qcom: Add QCS404 APPS Global compatible
  drivers: mailbox: Make ti-msgmr driver depend on ARCH_K3
  mailbox: Convert to using %pOFn instead of device_node.name
2018-10-29 10:30:44 -07:00
Houlong Wei
9f0a0a381c mailbox: mediatek: Add check for possible failure of kzalloc
The patch 623a6143a845("mailbox: mediatek: Add Mediatek CMDQ driver")
introduce the following static checker warning:
  drivers/mailbox/mtk-cmdq-mailbox.c:366 cmdq_mbox_send_data()
  error: potential null dereference 'task'.  (kzalloc returns null)

Fixes: 623a6143a8 ("mailbox: mediatek: Add Mediatek CMDQ driver")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Houlong Wei <houlong.wei@mediatek.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-09-29 12:42:39 +05:30
Colin Ian King
462f668e5c mailbox: bcm-flexrm-mailbox: fix spelling mistake "toogle" -> "toggle"
Trivial fix to spelling mistake in function name flexrm_flip_header_toogle,
rename it to flexrm_flip_header_toggle.

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-09-29 12:42:39 +05:30
Bjorn Andersson
0a01fa940e mailbox: qcom: Add QCS404 APPS Global compatible
Add support for the QCS404 APPS Global block with IPC register at offset
8.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-09-29 12:42:39 +05:30
Nishanth Menon
cfc0f7a8ea drivers: mailbox: Make ti-msgmr driver depend on ARCH_K3
ti-msgmr driver can support K3 platforms as well.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-09-29 12:42:39 +05:30
Rob Herring
94927676c7 mailbox: Convert to using %pOFn instead of device_node.name
In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-09-29 12:42:38 +05:30
David Arcari
afd0b1fb22 mailbox: PCC: handle parse error
acpi_pcc_probe() calls acpi_table_parse_entries_array() but fails
to check for an error return.  This in turn can result in calling
kcalloc() with a negative count as well as emitting the following
misleading erorr message:

[    2.642015] Could not allocate space for PCC mbox channels

Fixes: 8f8027c5f9 (mailbox: PCC: erroneous error message when parsing ACPI PCCT)
Signed-off-by: David Arcari <darcari@redhat.com>
Reviewed-by: Al Stone <ahs3@redhat.com>
Cc: 4.18+ <stable@vger.kernel.org> # 4.18+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-09-10 12:54:02 +02:00
Oleksij Rempel
2bb7005696 mailbox: Add support for i.MX messaging unit
The i.MX Messaging Unit is a two side block which allows applications
implement communication over this sides.

The MU includes the following features:
- Messaging control by interrupts or by polling
- Four general-purpose interrupt requests reflected to the other side
- Three general-purpose flags reflected to the other side
- Four receive registers with maskable interrupt
- Four transmit registers with maskable interrupt

Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-15 09:53:07 +05:30
Randy Dunlap
c5f45fbb46 mailbox: add MODULE_LICENSE() for mtk-cmdq-mailbox.c
Fix missing MODULE_LICENSE() in mtk-cmdq-mailbox.c:

WARNING: modpost: missing MODULE_LICENSE() in drivers/mailbox/mtk-cmdq-mailbox.o

Fixes: 623a6143a8 ("mailbox: mediatek: Add Mediatek CMDQ driver")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: <linux-mediatek@lists.infradead.org>
Cc: CK Hu <ck.hu@mediatek.com>
Cc: Houlong Wei <houlong.wei@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-15 09:43:37 +05:30
Houlong Wei
623a6143a8 mailbox: mediatek: Add Mediatek CMDQ driver
This patch is first version of Mediatek Command Queue(CMDQ) driver. The
CMDQ is used to help write registers with critical time limitation,
such as updating display configuration during the vblank. It controls
Global Command Engine (GCE) hardware to achieve this requirement.
Currently, CMDQ only supports display related hardwares, but we expect
it can be extended to other hardwares for future requirements.

Signed-off-by: Houlong Wei <houlong.wei@mediatek.com>
Signed-off-by: HS Liao <hs.liao@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 19:52:14 +05:30
Nishanth Menon
a2b79838b8 mailbox: ti-msgmgr: Add support for Secure Proxy
Secure Proxy is another communication scheme in Texas Instrument's
devices intended to provide an unique communication path from various
processors in the System on Chip(SoC) to a central System Controller.

Secure proxy is, in effect, an evolution of current generation Message
Manager hardware block found in K2G devices. However the following
changes have taken place:

Secure Proxy instance exposes "threads" or "proxies" which is
primary representation of "a" communication channel. Each thread is
preconfigured by System controller configuration based on SoC usage
requirements. Secure proxy by itself represents a single "queue" of
communication but allows the proxies to be independently operated.

Each Secure proxy thread can uniquely have their own error and threshold
interrupts allowing for more fine control of IRQ handling.

Provide the driver support for Secure Proxy and thread instances.

NOTE: Secure proxy configuration is only done by System Controller,
hence these are assumed to be pre-configured instances.

See AM65x Technical Reference Manual (SPRUID7, April 2018)
for further details: http://www.ti.com/lit/pdf/spruid7

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:57:41 +05:30
Nishanth Menon
89c976c2f3 mailbox: ti-msgmgr: Move the memory region name to descriptor
For newer generation of the hardware, the naming of the region is
decided at integration level and there could be additional regions
as well. Hence move the region naming to be described from compatible
descriptor.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:57:41 +05:30
Nishanth Menon
8e56086292 mailbox: ti-msgmgr: Change message count mask to be descriptor based
Change mask used to extract the message count to be descriptor based.

This is to support changes for count location for various SoC
solutions.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:57:41 +05:30
Nishanth Menon
5ab935e194 mailbox: ti-msgmgr: Allocate Rx channel resources only on request
In a much bigger system SoCs, the number of Rx channels can be
many and mostly unused based on the system of choice, and not all
Rx channels need IRQs and allocating all memory at probe will be
inefficient. Some SoCs could have total threads in the 100s and usage
would be just 1 Rx thread.

Thus, request and map the IRQs and allocate memory only when needed.

Since these channels are requested by client drivers on need, our
utilization will be optimal.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:57:41 +05:30
Nishanth Menon
e7474ca100 mailbox: ti-msgmgr: Get rid of unused structure members
Though q_proxies and q_slices do describe the hardware configuration,
they are not necessary for operation given that the values are
always default. Hence drop the same.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:57:41 +05:30
Suman Anna
ea2ec1e80f mailbox/omap: use of_device_get_match_data() to get match data
The OMAP Mailbox driver is directly using an integer value as
match data for distinguishing the interrupt register layout
between OMAP2 and OMAP4+ SoCs. Introduce a dedicated structure
for storing this match data, and simplify the probe function by
using the of_device_get_match_data() function. This allows the
driver to scale for 64-bit platforms by eliminating the unnecessary
type-casting between a u32 and a void pointer types.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:57:15 +05:30
Suman Anna
2ad5157650 mailbox/omap: switch to SPDX license identifier
Use the appropriate SPDX license identifier in the OMAP Mailbox
driver source files and drop the previous boilerplate license text.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:57:15 +05:30
Gustavo A. R. Silva
3512a18cbd mailbox: xgene-slimpro: Fix potential NULL pointer dereference
There is a potential execution path in which function
platform_get_resource() returns NULL. If this happens,
we will end up having a NULL pointer dereference.

Fix this by replacing devm_ioremap with devm_ioremap_resource,
which has the NULL check and the memory region request.

This code was detected with the help of Coccinelle.

Cc: stable@vger.kernel.org
Fixes: f700e84f41 ("mailbox: Add support for APM X-Gene platform mailbox driver")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-08-03 18:56:08 +05:30
Kees Cook
a86854d0c5 treewide: devm_kzalloc() -> devm_kcalloc()
The devm_kzalloc() function has a 2-factor argument form, devm_kcalloc().
This patch replaces cases of:

        devm_kzalloc(handle, a * b, gfp)

with:
        devm_kcalloc(handle, a * b, gfp)

as well as handling cases of:

        devm_kzalloc(handle, a * b * c, gfp)

with:

        devm_kzalloc(handle, array3_size(a, b, c), gfp)

as it's slightly less ugly than:

        devm_kcalloc(handle, array_size(a, b), c, gfp)

This does, however, attempt to ignore constant size factors like:

        devm_kzalloc(handle, 4 * 1024, gfp)

though any constants defined via macros get caught up in the conversion.

Any factors with a sizeof() of "unsigned char", "char", and "u8" were
dropped, since they're redundant.

Some manual whitespace fixes were needed in this patch, as Coccinelle
really liked to write "=devm_kcalloc..." instead of "= devm_kcalloc...".

The Coccinelle script used for this was:

// Fix redundant parens around sizeof().
@@
expression HANDLE;
type TYPE;
expression THING, E;
@@

(
  devm_kzalloc(HANDLE,
-	(sizeof(TYPE)) * E
+	sizeof(TYPE) * E
  , ...)
|
  devm_kzalloc(HANDLE,
-	(sizeof(THING)) * E
+	sizeof(THING) * E
  , ...)
)

// Drop single-byte sizes and redundant parens.
@@
expression HANDLE;
expression COUNT;
typedef u8;
typedef __u8;
@@

(
  devm_kzalloc(HANDLE,
-	sizeof(u8) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(__u8) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(char) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(unsigned char) * (COUNT)
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(u8) * COUNT
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(__u8) * COUNT
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(char) * COUNT
+	COUNT
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(unsigned char) * COUNT
+	COUNT
  , ...)
)

// 2-factor product with sizeof(type/expression) and identifier or constant.
@@
expression HANDLE;
type TYPE;
expression THING;
identifier COUNT_ID;
constant COUNT_CONST;
@@

(
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * (COUNT_ID)
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * COUNT_ID
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * (COUNT_CONST)
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * COUNT_CONST
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * (COUNT_ID)
+	COUNT_ID, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * COUNT_ID
+	COUNT_ID, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * (COUNT_CONST)
+	COUNT_CONST, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * COUNT_CONST
+	COUNT_CONST, sizeof(THING)
  , ...)
)

// 2-factor product, only identifiers.
@@
expression HANDLE;
identifier SIZE, COUNT;
@@

- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	SIZE * COUNT
+	COUNT, SIZE
  , ...)

// 3-factor product with 1 sizeof(type) or sizeof(expression), with
// redundant parens removed.
@@
expression HANDLE;
expression THING;
identifier STRIDE, COUNT;
type TYPE;
@@

(
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
)

// 3-factor product with 2 sizeof(variable), with redundant parens removed.
@@
expression HANDLE;
expression THING1, THING2;
identifier COUNT;
type TYPE1, TYPE2;
@@

(
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(TYPE2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(THING1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
|
  devm_kzalloc(HANDLE,
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
)

// 3-factor product, only identifiers, with redundant parens removed.
@@
expression HANDLE;
identifier STRIDE, SIZE, COUNT;
@@

(
  devm_kzalloc(HANDLE,
-	(COUNT) * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(COUNT) * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(COUNT) * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(COUNT) * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  devm_kzalloc(HANDLE,
-	COUNT * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
)

// Any remaining multi-factor products, first at least 3-factor products,
// when they're not all constants...
@@
expression HANDLE;
expression E1, E2, E3;
constant C1, C2, C3;
@@

(
  devm_kzalloc(HANDLE, C1 * C2 * C3, ...)
|
  devm_kzalloc(HANDLE,
-	(E1) * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(E1) * (E2) * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  devm_kzalloc(HANDLE,
-	(E1) * (E2) * (E3)
+	array3_size(E1, E2, E3)
  , ...)
|
  devm_kzalloc(HANDLE,
-	E1 * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
)

// And then all remaining 2 factors products when they're not all constants,
// keeping sizeof() as the second factor argument.
@@
expression HANDLE;
expression THING, E1, E2;
type TYPE;
constant C1, C2, C3;
@@

(
  devm_kzalloc(HANDLE, sizeof(THING) * C2, ...)
|
  devm_kzalloc(HANDLE, sizeof(TYPE) * C2, ...)
|
  devm_kzalloc(HANDLE, C1 * C2 * C3, ...)
|
  devm_kzalloc(HANDLE, C1 * C2, ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * (E2)
+	E2, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(TYPE) * E2
+	E2, sizeof(TYPE)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * (E2)
+	E2, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	sizeof(THING) * E2
+	E2, sizeof(THING)
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	(E1) * E2
+	E1, E2
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	(E1) * (E2)
+	E1, E2
  , ...)
|
- devm_kzalloc
+ devm_kcalloc
  (HANDLE,
-	E1 * E2
+	E1, E2
  , ...)
)

Signed-off-by: Kees Cook <keescook@chromium.org>
2018-06-12 16:19:22 -07:00
Kees Cook
6396bb2215 treewide: kzalloc() -> kcalloc()
The kzalloc() function has a 2-factor argument form, kcalloc(). This
patch replaces cases of:

        kzalloc(a * b, gfp)

with:
        kcalloc(a * b, gfp)

as well as handling cases of:

        kzalloc(a * b * c, gfp)

with:

        kzalloc(array3_size(a, b, c), gfp)

as it's slightly less ugly than:

        kzalloc_array(array_size(a, b), c, gfp)

This does, however, attempt to ignore constant size factors like:

        kzalloc(4 * 1024, gfp)

though any constants defined via macros get caught up in the conversion.

Any factors with a sizeof() of "unsigned char", "char", and "u8" were
dropped, since they're redundant.

The Coccinelle script used for this was:

// Fix redundant parens around sizeof().
@@
type TYPE;
expression THING, E;
@@

(
  kzalloc(
-	(sizeof(TYPE)) * E
+	sizeof(TYPE) * E
  , ...)
|
  kzalloc(
-	(sizeof(THING)) * E
+	sizeof(THING) * E
  , ...)
)

// Drop single-byte sizes and redundant parens.
@@
expression COUNT;
typedef u8;
typedef __u8;
@@

(
  kzalloc(
-	sizeof(u8) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(__u8) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(char) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(unsigned char) * (COUNT)
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(u8) * COUNT
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(__u8) * COUNT
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(char) * COUNT
+	COUNT
  , ...)
|
  kzalloc(
-	sizeof(unsigned char) * COUNT
+	COUNT
  , ...)
)

// 2-factor product with sizeof(type/expression) and identifier or constant.
@@
type TYPE;
expression THING;
identifier COUNT_ID;
constant COUNT_CONST;
@@

(
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * (COUNT_ID)
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * COUNT_ID
+	COUNT_ID, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * (COUNT_CONST)
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * COUNT_CONST
+	COUNT_CONST, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * (COUNT_ID)
+	COUNT_ID, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * COUNT_ID
+	COUNT_ID, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * (COUNT_CONST)
+	COUNT_CONST, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * COUNT_CONST
+	COUNT_CONST, sizeof(THING)
  , ...)
)

// 2-factor product, only identifiers.
@@
identifier SIZE, COUNT;
@@

- kzalloc
+ kcalloc
  (
-	SIZE * COUNT
+	COUNT, SIZE
  , ...)

// 3-factor product with 1 sizeof(type) or sizeof(expression), with
// redundant parens removed.
@@
expression THING;
identifier STRIDE, COUNT;
type TYPE;
@@

(
  kzalloc(
-	sizeof(TYPE) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(TYPE) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(TYPE) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(TYPE) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(TYPE))
  , ...)
|
  kzalloc(
-	sizeof(THING) * (COUNT) * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  kzalloc(
-	sizeof(THING) * (COUNT) * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  kzalloc(
-	sizeof(THING) * COUNT * (STRIDE)
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
|
  kzalloc(
-	sizeof(THING) * COUNT * STRIDE
+	array3_size(COUNT, STRIDE, sizeof(THING))
  , ...)
)

// 3-factor product with 2 sizeof(variable), with redundant parens removed.
@@
expression THING1, THING2;
identifier COUNT;
type TYPE1, TYPE2;
@@

(
  kzalloc(
-	sizeof(TYPE1) * sizeof(TYPE2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  kzalloc(
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(TYPE2))
  , ...)
|
  kzalloc(
-	sizeof(THING1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  kzalloc(
-	sizeof(THING1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(THING1), sizeof(THING2))
  , ...)
|
  kzalloc(
-	sizeof(TYPE1) * sizeof(THING2) * COUNT
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
|
  kzalloc(
-	sizeof(TYPE1) * sizeof(THING2) * (COUNT)
+	array3_size(COUNT, sizeof(TYPE1), sizeof(THING2))
  , ...)
)

// 3-factor product, only identifiers, with redundant parens removed.
@@
identifier STRIDE, SIZE, COUNT;
@@

(
  kzalloc(
-	(COUNT) * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	(COUNT) * (STRIDE) * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	(COUNT) * STRIDE * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	(COUNT) * (STRIDE) * (SIZE)
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
|
  kzalloc(
-	COUNT * STRIDE * SIZE
+	array3_size(COUNT, STRIDE, SIZE)
  , ...)
)

// Any remaining multi-factor products, first at least 3-factor products,
// when they're not all constants...
@@
expression E1, E2, E3;
constant C1, C2, C3;
@@

(
  kzalloc(C1 * C2 * C3, ...)
|
  kzalloc(
-	(E1) * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  kzalloc(
-	(E1) * (E2) * E3
+	array3_size(E1, E2, E3)
  , ...)
|
  kzalloc(
-	(E1) * (E2) * (E3)
+	array3_size(E1, E2, E3)
  , ...)
|
  kzalloc(
-	E1 * E2 * E3
+	array3_size(E1, E2, E3)
  , ...)
)

// And then all remaining 2 factors products when they're not all constants,
// keeping sizeof() as the second factor argument.
@@
expression THING, E1, E2;
type TYPE;
constant C1, C2, C3;
@@

(
  kzalloc(sizeof(THING) * C2, ...)
|
  kzalloc(sizeof(TYPE) * C2, ...)
|
  kzalloc(C1 * C2 * C3, ...)
|
  kzalloc(C1 * C2, ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * (E2)
+	E2, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(TYPE) * E2
+	E2, sizeof(TYPE)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * (E2)
+	E2, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	sizeof(THING) * E2
+	E2, sizeof(THING)
  , ...)
|
- kzalloc
+ kcalloc
  (
-	(E1) * E2
+	E1, E2
  , ...)
|
- kzalloc
+ kcalloc
  (
-	(E1) * (E2)
+	E1, E2
  , ...)
|
- kzalloc
+ kcalloc
  (
-	E1 * E2
+	E1, E2
  , ...)
)

Signed-off-by: Kees Cook <keescook@chromium.org>
2018-06-12 16:19:22 -07:00
Linus Torvalds
3a979e8c07 - Remove HAS_DMA config dependencies
- New STMicroelectronics STM32 IPCC driver
 - Enable QCom driver to run more controllers
 - Fixed return code from null to ptr-err for Brcm driver
 - Fix kconfig dependencies for the HiSilicon driver
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Merge tag 'mailbox-v4.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - Remove HAS_DMA config dependencies

 - New STMicroelectronics STM32 IPCC driver

 - Enable QCom driver to run more controllers

 - Fixed return code from null to ptr-err for Brcm driver

 - Fix kconfig dependencies for the HiSilicon driver

* tag 'mailbox-v4.18' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox/drivers/hisi: Consolidate the Kconfig for the MAILBOX
  mailbox: Add support for Qualcomm SDM845 SoCs
  dt-bindings: mailbox: Add APSS shared binding for SDM845 SoCs
  mailbox: bcm2835: Fix of_xlate return value
  mailbox: qcom: Add msm8998 hmss compatible
  mailbox: add STMicroelectronics STM32 IPCC driver
  dt-bindings: mailbox: add STMicroelectronics STM32 IPCC binding
  mailbox: Remove depends on HAS_DMA in case of platform dependency
2018-06-07 13:35:59 -07:00
Daniel Lezcano
f83d1cfc8b mailbox/drivers/hisi: Consolidate the Kconfig for the MAILBOX
The current defconfig is inconsistent as it selects the mailbox and
the clock for the hi6220 and the hi3660 without having their Kconfigs
making sure the dependencies are correct. It ends up when selecting
different versions for the kernel (for example when git bisecting)
those options disappear and they don't get back, leading to unexpected
behaviors. In our case, the cpufreq driver does no longer work because
the clock fails to initialize due to the clock stub and the mailbox
missing.

In order to have the dependencies correctly set when defaulting, let's
do the same as commit 3a49afb84c ("clk: enable hi655x common clk
automatically") where we select automatically the driver when the
parent driver is selected. With sensible defaults in place, we can leave
other choices for EXPERT.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-06-06 22:21:59 +05:30
Sibi Sankar
05e99a7d14 mailbox: Add support for Qualcomm SDM845 SoCs
Add the corresponding APSS shared offset for SDM845 SoC

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-06-06 22:21:59 +05:30
Stefan Wahren
00ee3a13a9 mailbox: bcm2835: Fix of_xlate return value
The bcm2835-mailbox returns NULL instead of an error pointer, which could
result in a NULL ptr dereference in mbox_request_channel. So fix this
by returning a proper error pointer.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Fixes: 0bae6af6d7 ("mailbox: Enable BCM2835 mailbox support")
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-06-06 22:21:59 +05:30
Bjorn Andersson
61a2f6db77 mailbox: qcom: Add msm8998 hmss compatible
The Qualcomm MSM8998 platform has a APCS HMSS GLOBAL block, add the
compatible for this.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-06-06 22:21:59 +05:30
Fabien Dessenne
ffbded7dee mailbox: add STMicroelectronics STM32 IPCC driver
The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-06-06 22:21:59 +05:30
Geert Uytterhoeven
19ed70c0b3 mailbox: Remove depends on HAS_DMA in case of platform dependency
Remove dependencies on HAS_DMA where a Kconfig symbol depends on another
symbol that implies HAS_DMA, and, optionally, on "|| COMPILE_TEST".
In most cases this other symbol is an architecture or platform specific
symbol, or PCI.

Generic symbols and drivers without platform dependencies keep their
dependencies on HAS_DMA, to prevent compiling subsystems or drivers that
cannot work anyway.

This simplifies the dependencies, and allows to improve compile-testing.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-06-06 22:21:15 +05:30
Al Stone
8f8027c5f9 mailbox: PCC: erroneous error message when parsing ACPI PCCT
There have been multiple reports of the following error message:

[    0.068293] Error parsing PCC subspaces from PCCT

This error message is not correct.  In multiple cases examined, the PCCT
(Platform Communications Channel Table) concerned is actually properly
constructed; the problem is that acpi_pcc_probe() which reads the PCCT
is making the assumption that the only valid PCCT is one that contains
subtables of one of two types: ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE or
ACPI_PCCT_TYPE_HW_REDUCED_TYPE2.  The number of subtables of these
types are counted and as long as there is at least one of the desired
types, the acpi_pcc_probe() succeeds.  When no subtables of these types
are found, regardless of whether or not any other subtable types are
present, the error mentioned above is reported.

In the cases reported to me personally, the PCCT contains exactly one
subtable of type ACPI_PCCT_TYPE_GENERIC_SUBSPACE.  The function
acpi_pcc_probe() does not count it as a valid subtable, so believes
there to be no valid subtables, and hence outputs the error message.

An example of the PCCT being reported as erroneous yet perfectly fine
is the following:

                    Signature : "PCCT"
                 Table Length : 0000006E
                     Revision : 05
                     Checksum : A9
                       Oem ID : "XXXXXX"
                 Oem Table ID : "XXXXX   "
                 Oem Revision : 00002280
              Asl Compiler ID : "XXXX"
        Asl Compiler Revision : 00000002

        Flags (decoded below) : 00000001
                     Platform : 1
                     Reserved : 0000000000000000

                Subtable Type : 00 [Generic Communications Subspace]
                       Length : 3E

                     Reserved : 000000000000
                 Base Address : 00000000DCE43018
               Address Length : 0000000000001000

            Doorbell Register : [Generic Address Structure]
                     Space ID : 01 [SystemIO]
                    Bit Width : 08
                   Bit Offset : 00
         Encoded Access Width : 01 [Byte Access:8]
                      Address : 0000000000001842

                Preserve Mask : 00000000000000FD
                   Write Mask : 0000000000000002
              Command Latency : 00001388
          Maximum Access Rate : 00000000
      Minimum Turnaround Time : 0000

To fix this, we count up all of the possible subtable types for the
PCCT, and only report an error when there are none (which could mean
either no subtables, or no valid subtables), or there are too many.
We also change the logic so that if there is a valid subtable, we
do try to initialize it per the PCCT subtable contents.  This is a
change in functionality; previously, the probe would have returned
right after the error message and would not have tried to use any
other subtable definition.

Tested on my personal laptop which showed the error previously; the
error message no longer appears and the laptop appears to operate
normally.

Signed-off-by: Al Stone <ahs3@redhat.com>
Reviewed-by: Prashanth Prakash <pprakash@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-05-18 12:08:15 +02:00
Kaihua Zhong
41c0e939d7 mailbox: Add support for Hi3660 mailbox
Hi3660 mailbox controller is used to send message within multiple
processors, MCU, HIFI, etc.  It supports 32 mailbox channels and every
channel can only be used for single transferring direction.  Once the
channel is enabled, it needs to specify the destination interrupt and
acknowledge interrupt, these two interrupt vectors are used to create
the connection between the mailbox and interrupt controllers.

The data transferring supports two modes, one is named as "automatic
acknowledge" mode so after send message the kernel doesn't need to wait
for acknowledge from remote and directly return; there have another mode
is to rely on handling interrupt for acknowledge.

This commit is for initial version driver, which only supports
"automatic acknowledge" mode to support CPU clock, which is the only
one consumer to use mailbox and has been verified.  Later may enhance
this driver for interrupt mode (e.g. for supporting HIFI).

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Ruyi Wang <wangruyi@huawei.com>
Signed-off-by: Kaihua Zhong <zhongkaihua@huawei.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-03-20 11:15:54 +08:00
Arnd Bergmann
85bd2de4f6 mailbox: tegra: relax TEGRA_HSP_MBOX Kconfig dependencies
With the addition of the ARCH_TEGRA_194_SOC driver, we get a new Kconfig warning:

warning: (ARCH_TEGRA_186_SOC && ARCH_TEGRA_194_SOC) selects TEGRA_HSP_MBOX which has unmet direct dependencies (MAILBOX && ARCH_TEGRA_186_SOC)

It looks like the dependency is a bit too strict here, allowing the driver to
be built for any Tegra chip avoids the problem.

Fixes: 6f9ed07fde ("soc/tegra: Add Tegra194 SoC configuration option")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-03-15 21:24:30 +05:30
Souptick Joarder
6de84023d3 maillbox: bcm-flexrm-mailbox: Use dma_pool_zalloc()
Use dma_pool_zalloc() instead of dma_pool_alloc + memset

Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-03-15 21:23:36 +05:30
Linus Torvalds
a9a08845e9 vfs: do bulk POLL* -> EPOLL* replacement
This is the mindless scripted replacement of kernel use of POLL*
variables as described by Al, done by this script:

    for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do
        L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'`
        for f in $L; do sed -i "-es/^\([^\"]*\)\(\<POLL$V\>\)/\\1E\\2/" $f; done
    done

with de-mangling cleanups yet to come.

NOTE! On almost all architectures, the EPOLL* constants have the same
values as the POLL* constants do.  But they keyword here is "almost".
For various bad reasons they aren't the same, and epoll() doesn't
actually work quite correctly in some cases due to this on Sparc et al.

The next patch from Al will sort out the final differences, and we
should be all done.

Scripted-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-02-11 14:34:03 -08:00
Linus Torvalds
8ac4840a3c Misc driver changes only :
- TI-MsgMgr: Fix print format for a printk
 - TI-MSgMgr: SPDX license switch for the driver
 - QCOM-IPC: Convert driver to use regmap
 - QCOM-IPC: Spawn sibling clock device from mailbox driver
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Merge tag 'mailbox-v4.16' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:
 "Misc driver changes only:

   - TI-MsgMgr: Fix print format for a printk

   - TI-MSgMgr: SPDX license switch for the driver

   - QCOM-IPC: Convert driver to use regmap

   - QCOM-IPC: Spawn sibling clock device from mailbox driver"

* tag 'mailbox-v4.16' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: qcom: Document the APCS clock binding
  mailbox: qcom: Create APCS child device for clock controller
  mailbox: qcom: Convert APCS IPC driver to use regmap
  mailbox: ti-msgmgr: Use %zu for size_t print format
  mailbox: ti-msgmgr: Switch to SPDX Licensing
2018-02-04 11:11:23 -08:00
Georgi Djakov
c815d769b5 mailbox: qcom: Create APCS child device for clock controller
There is a clock controller functionality provided by the APCS hardware
block of msm8916 devices. The device-tree would represent an APCS node
with both mailbox and clock provider properties.
Create a platform child device for the clock controller functionality so
the driver can probe and use APCS as parent.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-02-04 12:16:23 +05:30
Georgi Djakov
c6a8b171ca mailbox: qcom: Convert APCS IPC driver to use regmap
This hardware block provides more functionalities that just IPC. Convert
it to regmap to allow other child platform devices to use the same regmap.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-02-04 12:16:09 +05:30
Nishanth Menon
ca64af4392 mailbox: ti-msgmgr: Use %zu for size_t print format
message->len is of type size_t and %d is incorrect format usage.
Instead use %zu for handling size_t correctly.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-01-10 10:15:32 +05:30
Nishanth Menon
4f0ceb8789 mailbox: ti-msgmgr: Switch to SPDX Licensing
Switch to SPDX licensing and drop the GPL text which comes redundant.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2018-01-10 10:15:32 +05:30
Al Viro
afc9a42b74 the rest of drivers/*: annotate ->poll() instances
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2017-11-28 11:06:58 -05:00
Linus Torvalds
3c18767a45 Change to POLL api and fixes for FlexRM and OMAP driver
- Core: Prefer ACK method over POLL, if both supported
 - Test: use flag instead of special character
 - FlexRM: Usual driver internal minor churn
 - Omap: fix error path
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Merge tag 'mailbox-v4.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:
 "Change to POLL api and fixes for FlexRM and OMAP driver.

  Summary:

   - Core: Prefer ACK method over POLL, if both supported

   - Test: use flag instead of special character

   - FlexRM: Usual driver internal minor churn

   - Omap: fix error path"

* tag 'mailbox-v4.15' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox/omap: unregister mbox class
  mailbox: mailbox-test: don't rely on rx_buffer content to signal data ready
  mailbox: reset txdone_method TXDONE_BY_POLL if client knows_txdone
  mailbox: Build Broadcom FlexRM driver as loadable module for iProc SOCs
  mailbox: bcm-flexrm-mailbox: Use common GPL comment header
  mailbox: bcm-flexrm-mailbox: add depends on ARCH_BCM_IPROC
  mailbox: bcm-flexrm-mailbox: Print ring number in errors and warnings
  mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence
2017-11-15 13:39:18 -08:00
Arvind Yadav
1f90a2162f mailbox/omap: unregister mbox class
platform_driver_register() can fail here and we must unregister mbox
class.

Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Acked-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-11-14 20:21:35 +05:30
Sudeep Holla
e339c80af9 mailbox: mailbox-test: don't rely on rx_buffer content to signal data ready
Currently we rely on the first byte of the Rx buffer to check if there's
any data available to be read. If the first byte of the received buffer
is zero (i.e. null character), then we fail to signal that data is
available even when it's available.

Instead introduce a boolean variable to track the data availability and
update it in the channel receive callback as ready and clear it when the
data is read.

Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-11-14 20:21:32 +05:30
Sudeep Holla
33cd7123ac mailbox: reset txdone_method TXDONE_BY_POLL if client knows_txdone
Currently the mailbox framework sets txdone_method to TXDONE_BY_POLL if
the controller sets txdone_by_poll. However some clients can have a
mechanism to do TXDONE_BY_ACK which they can specify by knows_txdone.
However, we endup setting both TXDONE_BY_POLL and TXDONE_BY_ACK in that
case. In such scenario, we may end up with below warnings as the tx
ticker is run both by mailbox framework and the client.

WARNING: CPU: 1 PID: 0 at kernel/time/hrtimer.c:805 hrtimer_forward+0x88/0xd8
CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.12.0-rc5 #242
Hardware name: ARM LTD ARM Juno Development Platform
task: ffff8009768ca700 task.stack: ffff8009768f8000
PC is at hrtimer_forward+0x88/0xd8
LR is at txdone_hrtimer+0xd4/0xf8
Call trace:
 hrtimer_forward+0x88/0xd8
 __hrtimer_run_queues+0xe4/0x158
 hrtimer_interrupt+0xa4/0x220
 arch_timer_handler_phys+0x30/0x40
 handle_percpu_devid_irq+0x78/0x130
 generic_handle_irq+0x24/0x38
 __handle_domain_irq+0x5c/0xb8
 gic_handle_irq+0x54/0xa8

This patch fixes the issue by resetting TXDONE_BY_POLL if client has set
knows_txdone.

Cc: Alexey Klimov <alexey.klimov@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-11-14 20:21:28 +05:30
Linus Torvalds
04ed510988 ACPI updates for v4.15-rc1
- Update the ACPICA code to upstream revision 20170831 including
    * PDTT table header support (Bob Moore).
    * Cleanup and extension of internal string-to-integer conversion
      functions (Bob Moore).
    * Support for 64-bit hardware accesses (Lv Zheng).
    * ACPI PM Timer code adjustment to deal with 64-bit return values
      of acpi_hw_read() (Bob Moore).
    * Support for deferred table verification in acpiexec (Lv Zheng).
 
  - Fix APEI to use the fixmap instead of ioremap_page_range() which
    cannot work correctly the way the code in there attempted to use
    it and drop some code that's not necessary any more after that
    change (James Morse).
 
  - Clean up the APEI support code and make it use 64-bit timestamps
    (Arnd Bergmann, Dongjiu Geng, Jan Beulich).
 
  - Add operation region driver for TI PMIC TPS68470 (Rajmohan Mani).
 
  - Add support for PCC subspace IDs to the ACPI CPPC driver (George
    Cherian).
 
  - Fix an ACPI EC driver regression related to the handling of EC
    events during the "noirq" phases of system suspend/resume (Lv
    Zheng).
 
  - Delay the initialization of the lid state in the ACPI button
    driver to fix issues appearing on some systems (Hans de Goede).
 
  - Extend the KIOX000A "device always present" quirk to cover all
    affected BIOS versions (Hans de Goede).
 
  - Clean up some code in the ACPI core and drivers (Colin Ian King,
    Gustavo Silva).
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Merge tag 'acpi-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI updates from Rafael Wysocki:
 "These update ACPICA to upstream revision 20170831, fix APEI to use the
  fixmap instead of ioremap_page_range(), add an operation region driver
  for TI PMIC TPS68470, add support for PCC subspace IDs to the ACPI
  CPPC driver, fix a few assorted issues and clean up some code.

  Specifics:

   - Update the ACPICA code to upstream revision 20170831 including
      * PDTT table header support (Bob Moore).
      * Cleanup and extension of internal string-to-integer conversion
        functions (Bob Moore).
      * Support for 64-bit hardware accesses (Lv Zheng).
      * ACPI PM Timer code adjustment to deal with 64-bit return values
        of acpi_hw_read() (Bob Moore).
      * Support for deferred table verification in acpiexec (Lv Zheng).

   - Fix APEI to use the fixmap instead of ioremap_page_range() which
     cannot work correctly the way the code in there attempted to use it
     and drop some code that's not necessary any more after that change
     (James Morse).

   - Clean up the APEI support code and make it use 64-bit timestamps
     (Arnd Bergmann, Dongjiu Geng, Jan Beulich).

   - Add operation region driver for TI PMIC TPS68470 (Rajmohan Mani).

   - Add support for PCC subspace IDs to the ACPI CPPC driver (George
     Cherian).

   - Fix an ACPI EC driver regression related to the handling of EC
     events during the "noirq" phases of system suspend/resume (Lv
     Zheng).

   - Delay the initialization of the lid state in the ACPI button driver
     to fix issues appearing on some systems (Hans de Goede).

   - Extend the KIOX000A "device always present" quirk to cover all
     affected BIOS versions (Hans de Goede).

   - Clean up some code in the ACPI core and drivers (Colin Ian King,
     Gustavo Silva)"

* tag 'acpi-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (24 commits)
  ACPI: Mark expected switch fall-throughs
  ACPI / LPSS: Remove redundant initialization of clk
  ACPI / CPPC: Make CPPC ACPI driver aware of PCC subspace IDs
  mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
  ACPI / sysfs: Make function param_set_trace_method_name() static
  ACPI / button: Delay acpi_lid_initialize_state() until first user space open
  ACPI / EC: Fix regression related to triggering source of EC event handling
  APEI / ERST: use 64-bit timestamps
  ACPI / APEI: Remove arch_apei_flush_tlb_one()
  arm64: mm: Remove arch_apei_flush_tlb_one()
  ACPI / APEI: Remove ghes_ioremap_area
  ACPI / APEI: Replace ioremap_page_range() with fixmap
  ACPI / APEI: remove the unused dead-code for SEA/NMI notification type
  ACPI / x86: Extend KIOX000A quirk to cover all affected BIOS versions
  ACPI / APEI: adjust a local variable type in ghes_ioremap_pfn_irq()
  ACPICA: Update version to 20170831
  ACPICA: Update acpi_get_timer for 64-bit interface to acpi_hw_read
  ACPICA: String conversions: Update to add new behaviors
  ACPICA: String conversions: Cleanup/format comments. No functional changes
  ACPICA: Restructure/cleanup all string-to-integer conversion functions
  ...
2017-11-13 20:08:22 -08:00
Linus Torvalds
2bcc673101 Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer updates from Thomas Gleixner:
 "Yet another big pile of changes:

   - More year 2038 work from Arnd slowly reaching the point where we
     need to think about the syscalls themself.

   - A new timer function which allows to conditionally (re)arm a timer
     only when it's either not running or the new expiry time is sooner
     than the armed expiry time. This allows to use a single timer for
     multiple timeout requirements w/o caring about the first expiry
     time at the call site.

   - A new NMI safe accessor to clock real time for the printk timestamp
     work. Can be used by tracing, perf as well if required.

   - A large number of timer setup conversions from Kees which got
     collected here because either maintainers requested so or they
     simply got ignored. As Kees pointed out already there are a few
     trivial merge conflicts and some redundant commits which was
     unavoidable due to the size of this conversion effort.

   - Avoid a redundant iteration in the timer wheel softirq processing.

   - Provide a mechanism to treat RTC implementations depending on their
     hardware properties, i.e. don't inflict the write at the 0.5
     seconds boundary which originates from the PC CMOS RTC to all RTCs.
     No functional change as drivers need to be updated separately.

   - The usual small updates to core code clocksource drivers. Nothing
     really exciting"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (111 commits)
  timers: Add a function to start/reduce a timer
  pstore: Use ktime_get_real_fast_ns() instead of __getnstimeofday()
  timer: Prepare to change all DEFINE_TIMER() callbacks
  netfilter: ipvs: Convert timers to use timer_setup()
  scsi: qla2xxx: Convert timers to use timer_setup()
  block/aoe: discover_timer: Convert timers to use timer_setup()
  ide: Convert timers to use timer_setup()
  drbd: Convert timers to use timer_setup()
  mailbox: Convert timers to use timer_setup()
  crypto: Convert timers to use timer_setup()
  drivers/pcmcia: omap1: Fix error in automated timer conversion
  ARM: footbridge: Fix typo in timer conversion
  drivers/sgi-xp: Convert timers to use timer_setup()
  drivers/pcmcia: Convert timers to use timer_setup()
  drivers/memstick: Convert timers to use timer_setup()
  drivers/macintosh: Convert timers to use timer_setup()
  hwrng/xgene-rng: Convert timers to use timer_setup()
  auxdisplay: Convert timers to use timer_setup()
  sparc/led: Convert timers to use timer_setup()
  mips: ip22/32: Convert timers to use timer_setup()
  ...
2017-11-13 17:56:58 -08:00
George Cherian
c4b766c2f3 mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file in
preparation to add subspace ID support for cppc_acpi driver.

Signed-off-by: George Cherian <george.cherian@cavium.com>
Reviewed-by: Prashanth Prakash <pprakash@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-11-09 00:39:53 +01:00
Kees Cook
c6f15047dd mailbox: Convert timers to use timer_setup()
In preparation for unconditionally passing the struct timer_list pointer to
all timer callbacks, switch to using the new timer_setup() and from_timer()
to pass the timer pointer explicitly.

Cc: Ley Foon Tan <lftan@altera.com>
Cc: Jassi Brar <jassisinghbrar@gmail.com>
Cc: nios2-dev@lists.rocketboards.org
Signed-off-by: Kees Cook <keescook@chromium.org>
2017-11-06 12:49:51 -08:00
Greg Kroah-Hartman
b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Anup Patel
22d28b0ffc mailbox: Build Broadcom FlexRM driver as loadable module for iProc SOCs
By default, we build Broadcom FlexRM driver as loadable module for
iProc SOCs so that kernel image is little smaller and we load FlexRM
driver only when required.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-10-27 13:03:05 +05:30
Anup Patel
bf7e18991f mailbox: bcm-flexrm-mailbox: Use common GPL comment header
This patch makes the comment header of Broadcom FlexRM driver
similar to the GPL comment header used across Broadcom driver
sources.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-10-27 13:03:05 +05:30
Scott Branden
8f82121dcf mailbox: bcm-flexrm-mailbox: add depends on ARCH_BCM_IPROC
The Broadcom FlexRM Mailbox is only present in the Broadcom IPROC SoCs.
Add depends on ARCH_BCM_IPROC to BCM_FLEXRX_MBOX.

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-10-27 13:03:05 +05:30
Anup Patel
ca194c3830 mailbox: bcm-flexrm-mailbox: Print ring number in errors and warnings
This patch updates all dev_err() and dev_warn() to print
ring number so that we have more info for debugging.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-10-27 13:03:05 +05:30
Anup Patel
a371c10ea4 mailbox: bcm-flexrm-mailbox: Fix FlexRM ring flush sequence
As-per suggestion from FlexRM HW folks, we have to first set
FlexRM ring flush state and then clear it for FlexRM ring flush
to work properly.

Currently, the FlexRM driver has incomplete FlexRM ring flush
sequence which causes repeated insmod+rmmod of mailbox client
drivers to fail.

This patch fixes FlexRM ring flush sequence in flexrm_shutdown()
as described above.

Fixes: dbc049eee7 ("mailbox: Add driver for Broadcom FlexRM
ring manager")

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-10-27 13:03:05 +05:30
Linus Torvalds
dfd9e6d231 Just behavorial changes to a controller driver:
- Modified the Broadcom's Flexrm mailbox driver to
   support debugfs and TX-Done mechanism by ACK.
   Nothing for the core mailbox stack.
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Merge tag 'mailbox-v4.14' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:
 "Just behavorial changes to a controller driver: the Broadcom's Flexrm
  mailbox driver has been modifified to support debugfs and TX-Done
  mechanism by ACK.

  Nothing for the core mailbox stack"

* tag 'mailbox-v4.14' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: bcm-flexrm-mailbox: Use txdone_ack instead of txdone_poll
  mailbox: bcm-flexrm-mailbox: Use bitmap instead of IDA
  mailbox: bcm-flexrm-mailbox: Fix mask used in CMPL_START_ADDR_VALUE()
  mailbox: bcm-flexrm-mailbox: Add debugfs support
  mailbox: bcm-flexrm-mailbox: Set IRQ affinity hint for FlexRM ring IRQs
2017-09-07 13:23:37 -07:00
Anup Patel
1da92afbbf mailbox: bcm-flexrm-mailbox: Use txdone_ack instead of txdone_poll
Currently, FlexRM driver uses txdone_poll method of Linux Mailbox
to model the send_data() callback. To achieve this, we have introduced
"last_pending_msg" pointer for each FlexRM ring which keeps track of
the message that did not fit in the FlexRM ring.

This patch updates FlexRM driver to use txdone_ack method instead of
txdone_poll method because txdone_poll is not efficient for FlexRM
and requires additional tracking in FlexRM driver.

Also, moving to txdone_ack method helps us remove "last_pending_msg"
pointer and last_tx_done() callback.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-08-31 08:39:04 +05:30
Anup Patel
1f7466c6b4 mailbox: bcm-flexrm-mailbox: Use bitmap instead of IDA
Currently, we are using IDA library for managing IDs
on a FlexRM ring. The IDA library dynamically allocates
memory for underlying data structures which can cause
potential locking issue when allocating/free IDs from
flexrm_new_request() and flexrm_process_completions().

To tackle this, we replace use of IDA with bitmap for
each FlexRM ring and also protect the bitmap with FlexRM
ring lock.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-08-31 08:39:03 +05:30
Anup Patel
6d2061b981 mailbox: bcm-flexrm-mailbox: Fix mask used in CMPL_START_ADDR_VALUE()
The mask used in CMPL_START_ADDR_VALUE() should be 27bits instead of
26bits. This incorrect mask was causing completion writes to 40bits
physical address fail.

This patch fixes mask used in CMPL_START_ADDR_VALUE() macro.

Fixes: dbc049eee7 ("mailbox: Add driver for Broadcom FlexRM
ring manager")

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Cc: stable@vger.kernel.org
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-08-31 08:39:00 +05:30
Anup Patel
acf7e50a6b mailbox: bcm-flexrm-mailbox: Add debugfs support
This patch adds debugfs support to Broadcom FlexRM driver
so that we can see FlexRM ring state when any issue happens.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Vikram Prakash <vikram.prakash@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-08-31 08:38:59 +05:30
Anup Patel
6ac17fe8c1 mailbox: bcm-flexrm-mailbox: Set IRQ affinity hint for FlexRM ring IRQs
This patch set IRQ affinity hint for FlexRM ring IRQ at time of
enabling ring (i.e. flexrm_startup()). The IRQ affinity hint will
allow FlexRM driver to distribute FlexRM ring IRQs across online
CPUs so that all FlexRM ring IRQs don't land in CPU0 by default.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-08-31 08:38:44 +05:30
Punit Agrawal
66ed4cac66 mailbox: pcc: Drop uninformative output during boot
When booting on an ACPI enabled system that does not provide the
Platform Communications Channel Table (PCCT), the pcc mailbox driver
prints -

[    0.484261] PCCT header not found.

during probe before returning -ENODEV.

This message clutters the bootlog and doesn't provide any useful
information. Drop this message.

Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Alexey Klimov <alexey.klimov@arm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-08-10 01:33:01 +02:00
Hoan Tran
ecfc1599ef mailbox: pcc: Fix crash when request PCC channel 0
When PCCT is not available, kernel crashes as below when requests PCC
channel 0. This patch fixes this issue.

[    0.920454] PCCT header not found.
...
[    8.031309] Unable to handle kernel NULL pointer dereference at virtual address 00000010
[    8.031310] [0000000000000010] user address but active_mm is swapper
[    8.031312] Internal error: Oops: 96000004 [#1] PREEMPT SMP
[    8.031313] Modules linked in:
[    8.031316] CPU: 31 PID: 1 Comm: swapper/0 Tainted: G        W       4.13.0-rc1 #18
[    8.031317] Hardware name: AppliedMicro(R) 07/20/2017
[    8.031318] task: ffff809ef3b08000 task.stack: ffff809ef3b10000
[    8.031322] PC is at pcc_mbox_request_channel+0x8c/0x160
[    8.031325] LR is at xgene_slimpro_i2c_probe+0x1c0/0x378
[    8.031326] pc : [<ffff000008899450>] lr : [<ffff000008819dac>] pstate: 00000045
[    8.031327] sp : ffff809ef3b13bd0
[    8.031327] x29: ffff809ef3b13bd0 x28: ffff000008ed90a0
[    8.031329] x27: ffff000009091000 x26: ffff000008e50470
[    8.031330] x25: ffff000008ed9100 x24: ffff809eefd9ac30
[    8.031332] x23: 0000000000000000 x22: ffff0000090e3e10
[    8.031333] x21: ffff0000090e3000 x20: 0000000000000000
[    8.031335] x19: 0000000000000000 x18: 0000000000087ffc
[    8.031336] x17: 2fe48d76a78303f0 x16: 0000000000087ffc
[    8.031337] x15: ffff000000000000 x14: 0000000000000000
[    8.031339] x13: 0000000000000000 x12: 0000000000000018
[    8.031340] x11: 0000000000000018 x10: 0101010101010101
[    8.031342] x9 : 0000000000000000 x8 : 7f7f7f7f7f7f7f7f
[    8.031343] x7 : fefefefeff6b646d x6 : 0000008080808080
[    8.031345] x5 : 0000000000000000 x4 : 0000000000000001
[    8.031346] x3 : 0000000000000000 x2 : ffff000008819b64
[    8.031348] x1 : 0000000000000000 x0 : 0000000000000000
...
[    8.031393] Call trace:
[    8.031394] Exception stack(0xffff809ef3b13a00 to 0xffff809ef3b13b30)
[    8.031395] 3a00: 0000000000000000 0001000000000000 ffff809ef3b13bd0 ffff000008899450
[    8.031397] 3a20: ffff809f7e1f9a10 ffff000008f60be0 0000000000000001 ffff809ef3b13b7c
[    8.031398] 3a40: ffff809f7e1f9a10 0000000000000000 ffff000009091000 0000000000000003
[    8.031399] 3a60: ffff000009091000 0000000000000003 ffff809ef3b13a80 ffff0000084e0794
[    8.031400] 3a80: ffff809ef3b13a90 ffff00000850bb64 ffff809ef3b13ad0 ffff00000850bf34
[    8.031402] 3aa0: 0000000000000000 0000000000000000 ffff000008819b64 0000000000000000
[    8.031403] 3ac0: 0000000000000001 0000000000000000 0000008080808080 fefefefeff6b646d
[    8.031404] 3ae0: 7f7f7f7f7f7f7f7f 0000000000000000 0101010101010101 0000000000000018
[    8.031405] 3b00: 0000000000000018 0000000000000000 0000000000000000 ffff000000000000
[    8.031406] 3b20: 0000000000087ffc 2fe48d76a78303f0
[    8.031409] [<ffff000008899450>] pcc_mbox_request_channel+0x8c/0x160
[    8.031410] [<ffff000008819dac>] xgene_slimpro_i2c_probe+0x1c0/0x378
[    8.031413] [<ffff0000085e84dc>] platform_drv_probe+0x50/0xbc
[    8.031414] [<ffff0000085e68a4>] driver_probe_device+0x21c/0x2d0
[    8.031416] [<ffff0000085e6a04>] __driver_attach+0xac/0xb0
[    8.031417] [<ffff0000085e4a78>] bus_for_each_dev+0x58/0x98
[    8.031418] [<ffff0000085e61e4>] driver_attach+0x20/0x28
[    8.031419] [<ffff0000085e5e0c>] bus_add_driver+0x1c8/0x22c
[    8.031421] [<ffff0000085e7324>] driver_register+0x60/0xf4
[    8.031422] [<ffff0000085e8420>] __platform_driver_register+0x4c/0x54
[    8.031425] [<ffff000008e96dd0>] xgene_slimpro_i2c_driver_init+0x18/0x20
[    8.031426] [<ffff000008083144>] do_one_initcall+0x38/0x124
[    8.031429] [<ffff000008e50d0c>] kernel_init_freeable+0x190/0x22c
[    8.031431] [<ffff0000089eac30>] kernel_init+0x10/0xfc
[    8.031432] [<ffff000008082ec0>] ret_from_fork+0x10/0x50
[    8.031434] Code: cb030e63 8b030013 b140067f 54fffda8 (f9400a61)
[    8.031448] ---[ end trace 14eb48a4e1e1f9fb ]---

Signed-off-by: Hoan Tran <hotran@apm.com>
Acked-by: Prashanth Prakash <pprakash@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-07-26 02:11:47 +02:00
Linus Torvalds
21c19bc7ee Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:

 - Minor improvement : avoid requiring unnecessary startup/shutdown
   callback that many drivers seem to not need

 - New controller driver for Qualcomm's APCS IPC

* 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Introduce Qualcomm APCS IPC driver
  dt-bindings: mailbox: Introduce Qualcomm APCS global binding
  mailbox: Make startup and shutdown ops optional
2017-07-07 10:24:07 -07:00
Bjorn Andersson
25bfee16d5 mailbox: Introduce Qualcomm APCS IPC driver
This implements a driver that exposes the IPC bits found in the APCS
Global block in various Qualcomm platforms. The bits are used to signal
inter-processor communication signals from the application CPU to other
masters.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-06-14 17:47:19 +05:30
Bjorn Andersson
b7133d6fcd mailbox: Make startup and shutdown ops optional
Some mailbox hardware doesn't have to perform any additional operations
on startup of shutdown, so make these optional.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-06-14 17:47:09 +05:30
David E. Box
c7a1dfb95e ACPICA: Add support for new PCCT subtables
ACPICA commit e7b817e3c405a4fb9ae9ee7ae4992b8c1f20d284

Extended PCC Subspaces (types 3 and 4)

Link: https://github.com/acpica/acpica/commit/e7b817e3
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Signed-off-by: Bob Moore <robert.moore@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-06-12 14:58:39 +02:00
Sudeep Holla
cb710ab1d8 mailbox: handle empty message in tx_tick
We already check if the message is empty before calling the client
tx_done callback. Calling completion on a wait event is also invalid
if the message is empty.

This patch moves the existing empty message check earlier.

Fixes: 2b6d83e2b8 ("mailbox: Introduce framework for mailbox")
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-04-27 16:20:04 +05:30
Sudeep Holla
cc6eeaa302 mailbox: skip complete wait event if timer expired
If a wait_for_completion_timeout() call returns due to a timeout,
complete() can get called after returning from the wait which is
incorrect and can cause subsequent transmissions on a channel to fail.
Since the wait_for_completion_timeout() sees the completion variable
is non-zero caused by the erroneous/spurious complete() call, and
it immediately returns without waiting for the time as expected by the
client.

This patch fixes the issue by skipping complete() call for the timer
expiry.

Fixes: 2b6d83e2b8 ("mailbox: Introduce framework for mailbox")
Reported-by: Alexey Klimov <alexey.klimov@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-04-27 16:20:04 +05:30
Sudeep Holla
c61b781ee0 mailbox: always wait in mbox_send_message for blocking Tx mode
There exists a race when msg_submit return immediately as there was an
active request being processed which may have completed just before it's
checked again in mbox_send_message. This will result in return to the
caller without waiting in mbox_send_message even when it's blocking Tx.

This patch fixes the issue by waiting for the completion always if Tx
is in blocking mode.

Fixes: 2b6d83e2b8 ("mailbox: Introduce framework for mailbox")
Reported-by: Alexey Klimov <alexey.klimov@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Alexey Klimov <alexey.klimov@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-04-27 16:20:04 +05:30
Anup Patel
73874913d5 mailbox: Remove depends on COMPILE_TEST for BCM_FLEXRM_MBOX
The Broadcom FlexRM mailbox driver uses platform MSI support but
not all ARCHs provide asm/msi.h. Due to this, we get compilation
error in Broadcom FlexRM mailbox driver via linux/msi.h on ARCHs
which lack asm/msi.h.

This patch removes "depends on COMPILE_TEST" for Kconfig option
BCM_FLEXRM_MBOX so that Broadcom FlexRM mailbox driver is only
compiled for ARM64.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-03-29 11:08:30 +05:30
Alexey Klimov
4605fff00b mailbox: check ->last_tx_done for NULL in case of timer-based polling
It is allowed by code to register mailbox controller that sets txdone_poll
flag to request timer-based polling with missed ->last_tx_done() method.
If such thing happens and since presence of last_tx_done() is not checked
it will fail in hrtimer callback function txdone_hrtimer() when first
message will be transmitted.

This patch adds check for this method and logging of error on
registration of mailbox controller if it requested timer-based polling.

Signed-off-by: Alexey Klimov <alexey.klimov@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-03-28 23:52:02 +05:30
Anup Patel
dbc049eee7 mailbox: Add driver for Broadcom FlexRM ring manager
Some of the Broadcom iProc SoCs have FlexRM ring manager
which provides a ring-based programming interface to various
offload engines (e.g. RAID, Crypto, etc).

This patch adds a common mailbox driver for Broadcom FlexRM
ring manager which can be shared by various offload engine
drivers (implemented as mailbox clients).

Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Pramod KUMAR <pramod.kumar@broadcom.com>
Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-03-28 23:33:30 +05:30
Steve Lin
fc2041c541 mailbox: bcm-pdc: Add Northstar Plus support to PDC driver
Adds support for Northstar Plus (NS+) products to the PDC mailbox
driver.  The PDC driver was originally written to support the PDC
ring manager in the Northstar2 (64-bit) device.  The NS+ (32 bit
device) uses an almost identical ring manager, though with a
different name.  We just need to check for the type of hardware in
use, in order to write the appropriate interrupt configuration register.
Also updated DMA width to be correct for both NS+ and NS2.

Tested on NS+ and NS2.

Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-03-28 23:27:56 +05:30
Bhumika Goyal
8ce33c6ff3 mailbox: constify mbox_chan_ops structures
Check for mbox_chan_ops structures that are only stored in the ops field
of a mbox_controller structure. This field is of type const struct
mbox_chan_ops *, so mbox_chan_ops structures having this property can be
declared as const.
Done using Coccinelle:

@r1 disable optional_qualifier @
identifier i;
position p;
@@
struct mbox_chan_ops i@p = {...};

@ok1@
identifier r1.i;
struct hi6220_mbox mbox;
struct slimpro_mbox ctx;
position p;
@@
(
mbox.controller.ops=&i@p
|
ctx.mb_ctrl.ops=&i@p
)

@bad@
position p!={r1.p,ok1.p};
identifier r1.i;
@@
i@p

@depends on !bad disable optional_qualifier@
identifier r1.i;
@@
+const
struct mbox_chan_ops i;

File size details:

   text	   data	    bss	    dec	    hex	filename
   2310	    248	      0	   2558	    9fe	drivers/mailbox/hi6220-mailbox.o
   2366	    192	      0	   2558	    9fe	drivers/mailbox/hi6220-mailbox.o

   1500	    248	      0	   1748	    6d4 mailbox/mailbox-xgene-slimpro.o
   1556	    192	      0	   1748	    6d4 mailbox/mailbox-xgene-slimpro.o

Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2017-03-28 23:27:32 +05:30
Ingo Molnar
174cd4b1e5 sched/headers: Prepare to move signal wakeup & sigpending methods from <linux/sched.h> into <linux/sched/signal.h>
Fix up affected files that include this signal functionality via sched.h.

Acked-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mike Galbraith <efault@gmx.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2017-03-02 08:42:32 +01:00
Thomas Gleixner
8b0e195314 ktime: Cleanup ktime_set() usage
ktime_set(S,N) was required for the timespec storage type and is still
useful for situations where a Seconds and Nanoseconds part of a time value
needs to be converted. For anything where the Seconds argument is 0, this
is pointless and can be replaced with a simple assignment.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
2016-12-25 17:21:22 +01:00
Linus Torvalds
9be962d525 More ACPI updates for v4.10-rc1
- Move some Linux-specific functionality to upstream ACPICA and
    update the in-kernel users of it accordingly (Lv Zheng).
 
  - Drop a useless warning (triggered by the lack of an optional
    object) from the ACPI namespace scanning code (Zhang Rui).
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Merge tag 'acpi-extra-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull more ACPI updates from Rafael Wysocki:
 "Here are new versions of two ACPICA changes that were deferred
  previously due to a problem they had introduced, two cleanups on top
  of them and the removal of a useless warning message from the ACPI
  core.

  Specifics:

   - Move some Linux-specific functionality to upstream ACPICA and
     update the in-kernel users of it accordingly (Lv Zheng)

   - Drop a useless warning (triggered by the lack of an optional
     object) from the ACPI namespace scanning code (Zhang Rui)"

* tag 'acpi-extra-4.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  ACPI / osl: Remove deprecated acpi_get_table_with_size()/early_acpi_os_unmap_memory()
  ACPI / osl: Remove acpi_get_table_with_size()/early_acpi_os_unmap_memory() users
  ACPICA: Tables: Allow FADT to be customized with virtual address
  ACPICA: Tables: Back port acpi_get_table_with_size() and early_acpi_os_unmap_memory() from Linux kernel
  ACPI: do not warn if _BQC does not exist
2016-12-22 10:19:32 -08:00
Rafael J. Wysocki
c8e008e2a6 Merge branches 'acpica' and 'acpi-scan'
* acpica:
  ACPI / osl: Remove deprecated acpi_get_table_with_size()/early_acpi_os_unmap_memory()
  ACPI / osl: Remove acpi_get_table_with_size()/early_acpi_os_unmap_memory() users
  ACPICA: Tables: Allow FADT to be customized with virtual address
  ACPICA: Tables: Back port acpi_get_table_with_size() and early_acpi_os_unmap_memory() from Linux kernel

* acpi-scan:
  ACPI: do not warn if _BQC does not exist
2016-12-22 14:34:24 +01:00
Lv Zheng
6b11d1d677 ACPI / osl: Remove acpi_get_table_with_size()/early_acpi_os_unmap_memory() users
This patch removes the users of the deprectated APIs:
 acpi_get_table_with_size()
 early_acpi_os_unmap_memory()
The following APIs should be used instead of:
 acpi_get_table()
 acpi_put_table()

The deprecated APIs are invented to be a replacement of acpi_get_table()
during the early stage so that the early mapped pointer will not be stored
in ACPICA core and thus the late stage acpi_get_table() won't return a
wrong pointer. The mapping size is returned just because it is required by
early_acpi_os_unmap_memory() to unmap the pointer during early stage.

But as the mapping size equals to the acpi_table_header.length
(see acpi_tb_init_table_descriptor() and acpi_tb_validate_table()), when
such a convenient result is returned, driver code will start to use it
instead of accessing acpi_table_header to obtain the length.

Thus this patch cleans up the drivers by replacing returned table size with
acpi_table_header.length, and should be a no-op.

Reported-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-12-21 02:36:38 +01:00
Linus Torvalds
f95adbc1f7 Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:

 - new features (poll and SRAM usage) added to the mailbox-test driver

 - major update of Broadcom's PDC controller driver

 - minor fix for auto-loading test and STI driver modules

* 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: mailbox-test: allow reserved areas in SRAM
  mailbox: mailbox-test: add support for fasync/poll
  mailbox: bcm-pdc: Remove unnecessary void* casts
  mailbox: bcm-pdc: Simplify interrupt handler logic
  mailbox: bcm-pdc: Performance improvements
  mailbox: bcm-pdc: Don't use iowrite32 to write DMA descriptors
  mailbox: bcm-pdc: Convert from threaded IRQ to tasklet
  mailbox: bcm-pdc: Try to improve branch prediction
  mailbox: bcm-pdc: streamline rx code
  mailbox: bcm-pdc: Convert from interrupts to poll for tx done
  mailbox: bcm-pdc: PDC driver leaves debugfs files after removal
  mailbox: bcm-pdc: Changes so mbox client can be removed / re-inserted
  mailbox: bcm-pdc: Use octal permissions rather than symbolic
  mailbox: sti: Fix module autoload for OF registration
  mailbox: mailbox-test: Fix module autoload
2016-12-20 15:22:01 -08:00
Sudeep Holla
db4d22c07e mailbox: mailbox-test: allow reserved areas in SRAM
When CONFIG_SRAM is enable and the SRAM region is found, the entire SRAM
region resource is requested and marked as occupied by SRAM driver even
if certain parts of regions is marked reserved.

It's quite possible that a small region of the SRAM is reserved for all
the mailbox communication and hence it may fail to request the region
as it's already marked busy region.

This patch tries to just do a ioremap of this mailbox memory region if
it finds it busy.

Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:23 +05:30
Sudeep Holla
baef9a35d2 mailbox: mailbox-test: add support for fasync/poll
Currently the read operation on the message debug file returns error if
there's no data ready to be read. It expects the userspace to retry if
it fails. Since the mailbox response could be asynchronous, it would be
good to add support to block the read until the data is available.

We can also implement poll file operations so that the userspace can
wait to become ready to perform any I/O.

This patch implements the poll and fasync file operation callback for
the test mailbox device.

Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:23 +05:30
Rob Rice
cf17581340 mailbox: bcm-pdc: Remove unnecessary void* casts
Remove unnecessary void* casts in register writes. Fix two other
minor formatting issues.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Reviewed-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:23 +05:30
Rob Rice
30d1ef623f mailbox: bcm-pdc: Simplify interrupt handler logic
Earlier versions of the PDC driver registered for both
transmit and receive interrupts. The hard IRQ handler had to
communicate to the soft handler which interrupt(s) had occurred.
The PDC driver no longer registers for tx interrupts. So there is
no reason to save the intstatus. So remove the intstatus member
of the PDC state.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:22 +05:30
Rob Rice
63bb50bdb9 mailbox: bcm-pdc: Performance improvements
Three changes to improve performance in the PDC driver:
- disable and reenable interrupts while the interrupt handler is
running
- update rxin and txin descriptor indexes more efficiently
- group receive descriptor context into a structure and keep
context in a single array rather than five to improve locality
of reference

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:22 +05:30
Rob Rice
38ed49ed4a mailbox: bcm-pdc: Don't use iowrite32 to write DMA descriptors
In PDC driver, it is not necessary to use iowrite32()
when writing DMA descriptors to the transmit and receive rings.
The ring memory is in host memory. So convert to normal
assignment statements.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:21 +05:30
Rob Rice
8aef00f090 mailbox: bcm-pdc: Convert from threaded IRQ to tasklet
Previously used threaded IRQs in the PDC driver to defer
processing the rx DMA ring after getting an rx done interrupt.
Instead, use a tasklet at normal priority for deferred processing.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:21 +05:30
Rob Rice
7493cde34e mailbox: bcm-pdc: Try to improve branch prediction
Use likely/unlikely directives to improve branch prediction.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:20 +05:30
Rob Rice
e004c7e7d3 mailbox: bcm-pdc: streamline rx code
Remove the unnecessary rmb() from the receive path.

If the rx ring has multiple messages ready, avoid reading
last_rx_curr multiple times from the register.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:20 +05:30
Rob Rice
ab8d1b2d56 mailbox: bcm-pdc: Convert from interrupts to poll for tx done
The PDC driver is a mailbox controller. A mailbox controller
can report that a mailbox message has been "transmitted" either when
a tx interrupt fires or by having the mailbox framework poll. This
commit converts the PDC driver to the poll method. We found that the
tx interrupt happens when the descriptors are read by the SPU hw. Thus,
the interrupt method does not allow more than one tx message in the PDC
tx DMA ring at a time. To keep the SPU hw busy, we would like to keep
the tx ring full under heavy load.

With the poll method, the PDC driver responds that the previous message
has been transmitted if the tx ring has space for another message.
SPU request messages take a variable number of descriptors. If 15
descriptors are available, there is a good chance another message will
fit. Also increased the ring size from 128 to 512 descriptors.

With this change, I found the PDC driver hangs on its spinlock under
heavy load. The PDC spinlock is not required; so I removed it. Calls
to pdc_send_data() are already synchronized because of the channel
spinlock in the mailbox framework. Other references to ring indexes
should not require locking because they only written on either the
tx or rx side.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:19 +05:30
Steve Lin
9310f1ded4 mailbox: bcm-pdc: PDC driver leaves debugfs files after removal
Minor fix to ensure that debugfs stats pseudo-files are
removed when driver module is unloaded.  Previously, the call to
debugfs_remove_recursive() was never being called since the
directory was not empty, and a seg fault would occur if another
process tried to access these leftover files.

Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:19 +05:30
Steve Lin
9fb0f9ac54 mailbox: bcm-pdc: Changes so mbox client can be removed / re-inserted
Ensure that DMA is disabled, and pointers reset, when changing
DMA base addresses in pdc_ring_init().  This allows a mailbox client
to be re-inserted after being removed.  Otherwise, the DMA doesn't
restart so the client hangs while being reinserted.

Signed-off-by: Steve Lin <steven.lin1@broadcom.com>
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:18 +05:30
Rob Rice
9b1b2b3adb mailbox: bcm-pdc: Use octal permissions rather than symbolic
When creating the debugfs files for the PDC driver, use
octal file permissions rather than symbolic file permissions.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Andy Gospodarek <gospo@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:18 +05:30
Javier Martinez Canillas
2f50497d71 mailbox: sti: Fix module autoload for OF registration
If the driver is built as a module, autoload won't work because the module
alias information is not filled. So user-space can't match the registered
device with the corresponding module.

Export the module alias information using the MODULE_DEVICE_TABLE() macro.

Before this patch:

$ modinfo drivers/mailbox/mailbox-sti.ko | grep alias
alias:          platform:mailbox-sti

After this patch:

$ modinfo drivers/mailbox/mailbox-sti.ko | grep alias
alias:          platform:mailbox-sti
alias:          of:N*T*Cst,stih407-mailboxC*
alias:          of:N*T*Cst,stih407-mailbox

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:18 +05:30
Javier Martinez Canillas
f42cce3c24 mailbox: mailbox-test: Fix module autoload
If the driver is built as a module, autoload won't work because the module
alias information is not filled. So user-space can't match the registered
device with the corresponding module.

Export the module alias information using the MODULE_DEVICE_TABLE() macro.

Before this patch:

$ modinfo drivers/mailbox/mailbox-test.ko | grep alias
$

After this patch:

$ modinfo drivers/mailbox/mailbox-test.ko | grep alias
alias:          of:N*T*Cmailbox-testC*
alias:          of:N*T*Cmailbox-test

Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-12-19 20:10:17 +05:30
Linus Torvalds
991688bfc6 ARM: SoC driver updates for v4.10
Driver updates for ARM SoCs, including a couple of newly added drivers:
 
 - A new driver for the power management controller on TI Keystone
 - Support for the prerelease "SCPI" firmware protocol that ended up
   being shipped by Amlogic in their GXBB SoC.
 - A soc_device can now be matched using a glob from inside the
   kernel, when another driver wants to know the specific chip
   it is running on and cannot find out from DT, firmware or hardware.
 - Renesas SoCs now support identification through the soc_device
   interface, both in user space and kernel.
 - Renesas r8a7743 and r8a7745 gain support for their system controller
 - A new checking module for the ARM "PSCI" (not to be confused
   with "SCPI" mentioned above) firmware interface.
 - A new driver for the Tegra GMI memory interface
 - Support for the Tegra firmware interfaces with their
   power management controllers
 
 As usual, the updates for the reset controller framework are merged
 here, as they tend to touch multiple SoCs as well, including a new
 driver for the Oxford (now Broadcom) OX820 chip and the Tegra
 bpmp interface.
 
 The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
 Rockchips SoCs see some further updates.
 
 Conflicts:
 - ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
 - drivers/soc/renesas/Makefile: multiple files got added, keep
   all in logical sorting
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, including a couple of newly added
  drivers:

   - A new driver for the power management controller on TI Keystone

   - Support for the prerelease "SCPI" firmware protocol that ended up
     being shipped by Amlogic in their GXBB SoC.

   - A soc_device can now be matched using a glob from inside the
     kernel, when another driver wants to know the specific chip it is
     running on and cannot find out from DT, firmware or hardware.

   - Renesas SoCs now support identification through the soc_device
     interface, both in user space and kernel.

   - Renesas r8a7743 and r8a7745 gain support for their system
     controller

   - A new checking module for the ARM "PSCI" (not to be confused with
     "SCPI" mentioned above) firmware interface.

   - A new driver for the Tegra GMI memory interface

   - Support for the Tegra firmware interfaces with their power
     management controllers

  As usual, the updates for the reset controller framework are merged
  here, as they tend to touch multiple SoCs as well, including a new
  driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
  interface.

  The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
  Rockchips SoCs see some further updates"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
  misc: sram: remove useless #ifdef
  drivers: psci: Allow PSCI node to be disabled
  drivers: psci: PSCI checker module
  soc: renesas: Identify SoC and register with the SoC bus
  firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
  firmware: qcom: scm: Remove core, iface and bus clocks dependency
  dt-bindings: firmware: scm: Add MSM8996 DT bindings
  memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
  bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
  ARM: shmobile: Document DT bindings for Product Register
  soc: renesas: rcar-sysc: add R8A7745 support
  reset: Add Tegra BPMP reset driver
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
  ...
2016-12-15 16:03:25 -08:00
Dan Carpenter
68050eb6c6 mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
We have to use the _safe version of list_for_each() because we're
freeing the pointer as we go along.  (This might not show up testing
depending on what config options you have enabled).

Fixes: 0fe88461a0 ("mailbox: Add Tegra HSP driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18 14:32:13 +01:00
Thierry Reding
0fe88461a0 mailbox: Add Tegra HSP driver
This driver exposes a mailbox interface for interprocessor communication
using the Hardware Synchronization Primitives (HSP) module's doorbell
mechanism. There are multiple HSP instances and they provide additional
features such as shared mailboxes, shared and arbitrated semaphores.

A driver for a remote processor can use the mailbox client provided by
the HSP driver and build an IPC protocol on top of this synchronization
mechanism.

Based on work by Joseph Lo <josephl@nvidia.com>.

Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-11-18 14:26:13 +01:00
Hoan Tran
6ca595a70b mailbox: PCC: Fix lockdep warning when request PCC channel
This patch fixes the lockdep warning below

DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags))
------------[ cut here ]------------
WARNING: CPU: 1 PID: 1 at linux-next/kernel/locking/lockdep.c:2876 lockdep_trace_alloc+0xe0/0xf0
 Modules linked in:

 CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.8.0-11756-g86c5152 #46
...
 Call trace:
 Exception stack(0xffff8007da837890 to 0xffff8007da8379c0)
 7880:                                   ffff8007da834000 0001000000000000
 78a0: ffff8007da837a70 ffff0000081111a0 00000000600000c5 000000000000003d
 78c0: 9374bc6a7f3c7832 0000000000381878 ffff000009db7ab8 000000000000002f
 78e0: ffff00000811aabc ffff000008be2548 ffff8007da837990 ffff00000811adf8
 7900: ffff8007da834000 00000000024080c0 00000000000000c0 ffff000009021000
 7920: 0000000000000000 0000000000000000 ffff000008c8f7c8 ffff8007da579810
 7940: 000000000000002f ffff8007da858000 0000000000000000 0000000000000001
 7960: 0000000000000001 0000000000000000 ffff00000811a468 0000000000000002
 7980: 656c62617369645f 0000000000038187 00000000000000ee ffff8007da837850
 79a0: ffff000009db50c0 ffff000009db569d 0000000000000006 ffff000089db568f
 [<ffff0000081111a0>] lockdep_trace_alloc+0xe0/0xf0
 [<ffff0000081f4950>] __kmalloc_track_caller+0x50/0x250
 [<ffff00000857c088>] devres_alloc_node+0x28/0x60
 [<ffff0000081220e0>] devm_request_threaded_irq+0x50/0xe0
 [<ffff0000087e6220>] pcc_mbox_request_channel+0x110/0x170
 [<ffff0000084b2660>] acpi_cppc_processor_probe+0x264/0x414
 [<ffff0000084ae9f4>] __acpi_processor_start+0x28/0xa0
 [<ffff0000084aeab0>] acpi_processor_start+0x44/0x54
 [<ffff00000857897c>] driver_probe_device+0x1fc/0x2b0
 [<ffff000008578ae4>] __driver_attach+0xb4/0xc0
 [<ffff00000857683c>] bus_for_each_dev+0x5c/0xa0
 [<ffff000008578110>] driver_attach+0x20/0x30
 [<ffff000008577c20>] bus_add_driver+0x110/0x230
 [<ffff000008579320>] driver_register+0x60/0x100
 [<ffff000008d478b8>] acpi_processor_driver_init+0x2c/0xb0
 [<ffff000008083168>] do_one_initcall+0x38/0x130
 [<ffff000008d20d6c>] kernel_init_freeable+0x210/0x2b4
 [<ffff000008945d90>] kernel_init+0x10/0x110
 [<ffff000008082e80>] ret_from_fork+0x10/0x50

It's because the spinlock inside pcc_mbox_request_channel() is
kept too long. This patch releases spinlock before request_irq()
and free_irq() to fix this issue  as spinlock is only needed to
protect the channel data.

Signed-off-by: Hoan Tran <hotran@apm.com>
Reviewed-by: Prashanth Prakash <pprakash@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-11-14 22:07:38 +01:00
Linus Torvalds
c6594fc6af Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jussi Brar:
 "New driver and DT bindings for MHU controller integrated on Amlogic
  Meson platform"

* 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  dt-bindings: mailbox: Add Amlogic Meson MHU Bindings
  mailbox: Add Platform Message-Handling-Unit variant driver
2016-10-06 17:36:53 -07:00
Rafael J. Wysocki
0d573c6a01 Merge branches 'acpi-x86', 'acpi-cppc' and 'acpi-soc'
* acpi-x86:
  x86: ACPI: make variable names clearer in acpi_parse_madt_lapic_entries()
  x86: ACPI: remove extraneous white space after semicolon

* acpi-cppc:
  ACPI / CPPC: Support PCC with interrupt flag
  ACPI / CPPC: Add prefix cppc to cpudata structure name
  ACPI / CPPC: Add support for functional fixed hardware address
  ACPI / CPPC: Don't return on CPPC probe failure
  ACPI / CPPC: Allow build with ACPI_CPU_FREQ_PSS config
  ACPI / CPPC: check for error bit in PCC status field
  ACPI / CPPC: move all PCC related information into pcc_data
  ACPI / CPPC: add sysfs support to compute delivered performance
  ACPI / CPPC: set a non-zero value for transition_latency
  ACPI / CPPC: support for batching CPPC requests
  ACPI / CPPC: acquire pcc_lock only while accessing PCC subspace
  ACPI / CPPC: restructure read/writes for efficient sys mapped reg ops
  mailbox: pcc: Support HW-Reduced Communication Subspace type 2

* acpi-soc:
  ACPI / APD: constify local structures
  ACPI / APD: Add device HID for Vulcan SPI controller
2016-10-02 01:39:09 +02:00
Neil Armstrong
ad3a212c1d mailbox: Add Platform Message-Handling-Unit variant driver
Add Message-Handling-Unit driver for platform variants as mailbox controller.
Actually, only the Amlogic Meson GXBB SoC MHU is supported.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-09-07 13:07:17 +05:30
hotran
aca314efb1 mailbox: pcc: Support HW-Reduced Communication Subspace type 2
ACPI 6.1 has a PCC HW-Reduced Communication Subspace type 2 intended for
use on HW-Reduce ACPI Platform, which requires read-modify-write sequence
to acknowledge doorbell interrupt. This patch provides the implementation
for the Communication Subspace Type 2.

Signed-off-by: Hoan Tran <hotran@apm.com>
Reviewed-by: Prashanth Prakash <pprakash@codeaurora.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-08-31 00:37:20 +02:00
Baoyou Xie
a75e4a85f4 fix📫bcm-pdc-mailbox:mark symbols static where possible
We get 2 warnings when biuld kernel with W=1:
drivers/mailbox/bcm-pdc-mailbox.c:472:6: warning: no previous prototype for 'pdc_setup_debugfs' [-Wmissing-prototypes]
drivers/mailbox/bcm-pdc-mailbox.c:488:6: warning: no previous prototype for 'pdc_free_debugfs' [-Wmissing-prototypes]

In fact, these functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
so this patch marks these functions with 'static'.

Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-08-29 18:43:39 +05:30
Dan Carpenter
068cf29eca mailbox: bcm-pdc: potential NULL dereference in pdc_shutdown()
We can't pass NULL pointers to pdc_ring_free() so I moved the check for
NULL.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-08-29 18:41:15 +05:30
Rob Rice
e0c6fba45a mailbox: Add HAS_DMA Kconfig dependency to BCM_PDC_MBOX
Add HAS_DMA Kconfig dependency to BCM_PDC_MBOX to avoid link
error on some platforms.

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Rob Rice <rrice@broadcom.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-08-29 18:39:46 +05:30
Rob Rice
a68b216676 mailbox: Fix format and type mismatches in Broadcom PDC driver
Fix format and type mismatches in a couple debug prints in the
Broadcom PDC driver. Use %pad for dma_addr_t and %pa for
resource_size_t.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-07-28 21:27:31 +05:30
Rob Rice
a24532f8d1 mailbox: Add Broadcom PDC mailbox driver
The Broadcom PDC mailbox driver is a mailbox controller that
manages data transfers to and from one or more offload engines.

Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-07-28 09:34:47 +05:30
Ben Dooks
9ac3e85a5c mailbox: pl320: remove __raw IO
The use of __raw IO accesors is not endian safe and should be used
sparingly. The relaxed variants should be as lightweight and also
are endian safe.

Note, this has not been run-time tested.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-06-24 13:32:31 +05:30
Sudeep Holla
9ef3c51121 mailbox: mailbox-test: set tdev->signal to NULL after freeing
tdev->signal is not set NULL after it's freed. This will cause random
exceptions when the stale pointer is accessed after tdev->signal is
freed. Also, since tdev->signal allocation is skipped the next time
it's written, this leads to continuous fault finally leading to the
total death of the system.

Fixes: d1c2f87c9a ("mailbox: mailbox-test: Prevent memory leak")
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-06-12 15:13:04 +05:30
Amitoj Kaur Chawla
c430cf376f mailbox: Fix devm_ioremap_resource error detection code
devm_ioremap_resource returns an ERR_PTR value, not NULL,
on failure.

The Coccinelle semantic patch used to make this change is
as follows:
@@
expression e,e1;
statement S;
@@

*e = devm_ioremap_resource(...);
if (!e1) S

Signed-off-by: Amitoj Kaur Chawla <amitoj1606@gmail.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-05-08 22:44:46 +05:30
Suman Anna
dd28216528 mailbox/omap: kill omap_mbox_{save/restore}_ctx() functions
The omap_mbox_save_ctx() and omap_mbox_restore_ctx() API were
previously provided to OMAP mailbox clients to save and restore
the mailbox context during system suspend/resume. The save and
restore functionality is now implemented through System PM driver
callbacks, and there is no need for these functions, so kill these
API.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:38 +05:30
Suman Anna
9f0cee984a mailbox/omap: check for any unread messages during suspend
The OMAP mailbox driver is used by clients to communicate with remote
processors in general. The mailbox clients are expected to have stopped
communicating with these remote processors during a system suspend. The
OMAP mailbox fifos are expected to not have any messages as such. Add a
check for any pending unprocessed messages in the suspend callback, to
detect any communication protocol issues of the mailbox clients. The
system suspend is aborted if any messages are found.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:38 +05:30
Suman Anna
af1d2f5cb9 mailbox/omap: add support for suspend/resume
Support has been added to the OMAP mailbox driver to allow it
to work across a system suspend/resume. The OMAP mailbox driver
requires only the interrupt configuration registers to be saved
and restored, and this is done in the suspend/resume callbacks.
The registers need to be saved only if there are active clients
at the time of suspend. The enabling and disabling of the mailbox
clocks is done automatically by the omap_device layer.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:38 +05:30
Suman Anna
2240f8aefc mailbox/omap: store mailbox interrupt type in omap_mbox_device
The interrupt type used for identifying the layout of the interrupt
configuration registers between OMAP4+ SoCs and older SoCs is stored
only in the sub-mailbox structures for easier access. Store this type
in the the omap_mbox_device structure as well along with the other
global variables. This is being done to facilitate the context save
and restore of appropriate registers during system suspend/resume.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:38 +05:30
Suman Anna
2665a4c1d4 mailbox/omap: add blank lines after declarations
Fix couple of checkpatch warnings of the type,
"WARNING: Missing a blank line after declarations"

Also, fixed a warning about a space after a typecast
while at this.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:37 +05:30
Suman Anna
0196fa3945 mailbox/omap: remove FSF mailing address paragraph
Remove the paragraph about writing to the Free Software
Foundation's mailing address from the GPL license header
as this address can change. This fixes the corresponding
checkpatch warning.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:37 +05:30
Suman Anna
86f6f5e2e2 mailbox/omap: use variable name for sizeof() operator
Fix the code formatting to use the kernel preferred style
of using the actual variables to determize the size using
the sizeof() operator. This fixes the corresponding checkpatch
warning as well.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:37 +05:30
Suman Anna
4899f78a3d mailbox/omap: drop legacy platform device support
OMAP mailbox devices can no longer be created in legacy non-DT
mode, all the relevant code has been cleaned up. The OMAP mailbox
driver will only support devices created from DT going forward,
so drop the legacy platform device support from the driver.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-26 10:19:37 +05:30
Linus Torvalds
a7109a2ca7 Merge branch 'mailbox-devel' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox fixes from Jussi Brar:
 "Misc fixes:

  mailbox-test driver:
   - prevent memory leak and another cosmetic change

  mailbox:
   - change the returned error code

  Xgene driver:
   - return -ENOMEM instead of PTR_ERR for failed devm_kzalloc"

* 'mailbox-devel' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Stop using ENOSYS for anything other than unimplemented syscalls
  mailbox: mailbox-test: Prevent memory leak
  mailbox: mailbox-test: Use more consistent format for calling copy_from_user()
  mailbox: xgene-slimpro: Fix wrong test for devm_kzalloc
2016-04-14 18:40:47 -07:00
Lee Jones
0c44d7896c mailbox: Stop using ENOSYS for anything other than unimplemented syscalls
In accordance with e15f431fe2 ("errno.h: Improve ENOSYS's comment") and
91c9afaf97 ("checkpatch.pl: new instances of ENOSYS are errors") we're
converting from the old meaning of: ENOSYS "Function not implemented" to
a more standard EINVAL.

Reported-by: Seraphin Bonnaffe <seraphin.bonnaffe@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-12 13:28:32 +05:30
Lee Jones
d1c2f87c9a mailbox: mailbox-test: Prevent memory leak
If we set the Signal twice or more, without using it as part of a message,
memory will be re-allocated and the pointer over-written.  Prevent this
potential leak by only allocating memory when there isn't any already.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-12 13:28:30 +05:30
Lee Jones
17f5f28ffa mailbox: mailbox-test: Use more consistent format for calling copy_from_user()
While we're at it, ensure copy-to location is NULL'ed in the error path.

Suggested-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-12 13:28:20 +05:30
Rafael J. Wysocki
fa81e66ec8 Merge branches 'pm-cpufreq', 'pm-cpuidle' and 'acpi-cppc'
* pm-cpufreq:
  cpufreq: dt: Drop stale comment
  cpufreq: intel_pstate: Documenation for structures
  cpufreq: intel_pstate: fix inconsistency in setting policy limits
  intel_pstate: Avoid extra invocation of intel_pstate_sample()
  intel_pstate: Do not set utilization update hook too early

* pm-cpuidle:
  intel_idle: Add KBL support
  intel_idle: Add SKX support
  intel_idle: Clean up all registered devices on exit.
  intel_idle: Propagate hot plug errors.
  intel_idle: Don't overreact to a cpuidle registration failure.
  intel_idle: Setup the timer broadcast only on successful driver load.
  intel_idle: Avoid a double free of the per-CPU data.
  intel_idle: Fix dangling registration on error path.
  intel_idle: Fix deallocation order on the driver exit path.
  intel_idle: Remove redundant initialization calls.
  intel_idle: Fix a helper function's return value.
  intel_idle: remove useless return from void function.

* acpi-cppc:
  mailbox: pcc: Don't access an unmapped memory address space
2016-04-08 21:46:05 +02:00
Axel Lin
a61b37ead5 mailbox: xgene-slimpro: Fix wrong test for devm_kzalloc
devm_kzalloc() returns NULL on failure.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-04-08 09:30:11 +05:30
Shanker Donthineni
169b38373f mailbox: pcc: Don't access an unmapped memory address space
The acpi_pcc_probe() may end up accessing memory outside of the PCCT
table space causing the kernel panic(). Increment the pcct_entry
pointer after parsing 'HW-reduced Communications Subspace' to fix
the problem. This change also enables the parsing of subtable at
index 0.

Signed-off-by: Shanker Donthineni <shankerd@codeaurora.org>
Acked-by: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-04-07 01:25:28 +02:00
Linus Torvalds
988faa7312 Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull more mailbox updates from Jassi Brar:
 "Device tree bindings and driver for TI's Message-Manager controller.

  Due to some last minute cosmetic changes, the driver was not included
  in the first pull request, otherwise the driver has been reviewed
  twice"

* 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: Introduce TI message manager driver
  Documentation: dt: mailbox: Add TI Message Manager
2016-03-23 06:09:15 -07:00
Nishanth Menon
aace66b170 mailbox: Introduce TI message manager driver
Support for TI Message Manager Module. This hardware block manages a
bunch of hardware queues meant for communication between processor
entities.

Clients sitting on top of this would manage the required protocol
for communicating with the counterpart entities.

For more details on TI Message Manager hardware block, see documentation
that will is available here: http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf
Chapter 8.1(Message Manager)

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-21 20:33:15 +05:30
Linus Torvalds
2b2f72d8ce Merge branch 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar:

 - mailbox bindings and drivers for
     * APM X-Gene
     * Hisilicon Hi6220
     * Rockchip RK3368
   platforms

 - minor fixes to the above three drivers.

 - misc cleanups of mailbox-test driver.

* 'mailbox-for-next' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: rockchip: avoid 64-bit division
  mailbox: rockchip: Add Rockchip mailbox driver
  dt-bindings: rockchip-mailbox: Add mailbox controller document on Rockchip SoCs
  mailbox/xgene-slimpro: Checking for IS_ERR instead of NULL
  mailbox: Hi6220: add mailbox driver
  dt-bindings: mailbox: Document Hi6220 mailbox driver
  mailbox: mailbox-test: add support for separate tx/rx buffer with single channel
  mailbox: mailbox-test: use print_hex_dump_bytes to allow dynamic printk
  mailbox: mailbox-test: fix the compatible string
  mailbox: mailbox-test: rename driver as generic test driver
  Documentation: mailbox: Add APM X-Gene SLIMpro mailbox dts documentation
  mailbox: Add support for APM X-Gene platform mailbox driver
2016-03-20 12:58:32 -07:00
Arnd Bergmann
c5a9d1f30c mailbox: rockchip: avoid 64-bit division
The newly added rockchip mailbox driver causes a bug in
the ARM allyesconfig build because of a division of a resource_size_t
variable that may be 64 bit wide:

drivers/mailbox/built-in.o: In function `rockchip_mbox_probe':
:(.text+0x6614): undefined reference to `__aeabi_uldivmod'

This adds a cast to size_t, which turns it into a 32-bit division
in this case. This is safe because we know that we cannot possibly
map a resource that is longer than what a pointer contains, and
in practice it will be very short instead.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-16 09:18:15 +05:30
Rafael J. Wysocki
6a8ccb1dfd Merge branches 'acpi-processor' and 'acpi-cppc'
* acpi-processor:
  ACPI / sleep: move acpi_processor_sleep to sleep.c
  ACPI / processor : add support for ACPI0010 processor container
  ACPI / processor_idle: replace PREFIX with pr_fmt

* acpi-cppc:
  ACPI / CPPC: use MRTT/MPAR to decide if/when a req can be sent
  ACPI / CPPC: replace writeX/readX to PCC with relaxed version
  mailbox: pcc: optimized pcc_send_data
  ACPI / CPPC: optimized cpc_read and cpc_write
  ACPI / CPPC: Optimize PCC Read Write operations
2016-03-14 14:20:33 +01:00
Caesar Wang
f70ed3b5dc mailbox: rockchip: Add Rockchip mailbox driver
This driver is found on RK3368 SoCs.

The Mailbox module is a simple APB peripheral that allows both
the Cortex-A53 MCU system to communicate by writing operation to
generate interrupt.
The registers are accessible by both CPU via APB interface.

The Mailbox has the following main features:

1) Support dual-core system: Cortex-A53 and MCU.
2) Support APB interface.
3) Support four mailbox elements, each element includes one data word,
   one command word register and one flag bit that can represent
   one interrupt.
4) Four interrupts to Cortex-A53.
5) Four interrupts to MCU.
6) Provide 32 lock registers for software to use to indicate whether
   mailbox is occupied.

[Jassi: Removed unused variable buf_base]

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-11 10:40:06 +07:00
Prakash, Prashanth
8b0f578898 mailbox: pcc: optimized pcc_send_data
pcc_send_data() can be invoked during the execution of performance
critical code as in cppc_cpufreq driver. With acpi_* APIs, the
doorbell register accessed in pcc_send_data() if present in system
memory will be searched (in cached virt to phys addr mapping),
mapped, read/written and then unmapped. These operations take
significant amount of time.

This patch maps the performance critical doorbell register
during init and then reads/writes to it directly using the
mapped virtual address. This patch + similar changes to CPPC
acpi driver reduce the time per freq. transition from around
200us to about 20us for the CPPC cpufreq driver

Signed-off-by: Prashanth Prakash <pprakash@codeaurora.org>
Acked-by: Ashwin Chaugule <ashwin.chaugule@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-09 23:35:29 +01:00
Dan Carpenter
14d653af4e mailbox/xgene-slimpro: Checking for IS_ERR instead of NULL
devm_ioremap() returns NULL, it never returns an ERR_PTR.

Fixes: f700e84f41 ('mailbox: Add support for APM X-Gene platform mailbox driver')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-04 12:32:20 +05:30
Leo Yan
9c384189f5 mailbox: Hi6220: add mailbox driver
Add driver for Hi6220 mailbox, the mailbox communicates with MCU; for
sending data, it can support two methods for low level implementation:
one is to use interrupt as acknowledge, another is automatic mode which
without any acknowledge. These two methods have been supported in the
driver. For receiving data, it will depend on the interrupt to notify
the channel has incoming message.

Now mailbox driver is used to send message to MCU to control dynamic
voltage and frequency scaling for CPU, GPU and DDR.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-04 12:32:20 +05:30
Sudeep Holla
2d74ffdc91 mailbox: mailbox-test: add support for separate tx/rx buffer with single channel
This patch adds support for different MMIO region for Tx and Rx paths.
If only one region is specified, it's assumed to be shared between Rx
and Tx, thereby retaining backward compatibility.

Also in order to support single channel dealing with both Tx and Rx with
dedicated MMIO regions, Tx channel itself is assigned to Rx if MMIO
regions are different and Rx is not specified.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-04 12:32:19 +05:30
Sudeep Holla
27fa680f7f mailbox: mailbox-test: use print_hex_dump_bytes to allow dynamic printk
Reduce the logging from info to debug. Also use print_hex_dump_bytes
instead as it has support for dynamic printk providing options to
conditionally enable/disable these logs.

Cc: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-04 12:32:19 +05:30
Sudeep Holla
c428013783 mailbox: mailbox-test: fix the compatible string
Underscores are usually forbidden in the compatible strings. So lets
remove it before the first users of this is seen.

Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-04 12:32:18 +05:30
Sudeep Holla
adf06ba9b3 mailbox: mailbox-test: rename driver as generic test driver
This mailbox-test driver was designed to be generic, so let's remove ST
tag on it and make it generic.

Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-03-04 12:32:13 +05:30
Duc Dang
f700e84f41 mailbox: Add support for APM X-Gene platform mailbox driver
X-Gene mailbox controller provides 8 mailbox channels, with
each channel has a dedicated interrupt line.

Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Duc Dang <dhdang@apm.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2016-02-15 13:20:03 +05:30