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1. Match Exynos5433 DTS with dtschema.
2. Add an Exynos Auto v9 SoC and SADK board. The Exynos Auto v9 is a
design for automotive for In-vehicle Infotainments (IVI) and Advanced
Driver-Assistance Systems (ADAS).
This pull request brings very basic support (pinctrl, UART and UFS
storage) with a development SADK (Samsung Automotive Development Kit)
board.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmFnB2oQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD19qQD/wLYOTIp032qz78kpR/zzgKG6ZvLwLDLmua
WOQEsUFvQWQgP7iZ5qIMvjhxAcGYjLstsqv1ed8PpiXFbwacAZqSszFE5jRqkBbK
cXa2+lh3iSDDvr/Jznzm+17KXN6/6qbkgi3xrRXbk7Ih7D230Ox6ztknP3IYhGU7
OMuL1nc/gHph+nZbPD9N8Ts7f8D3RtAkYX3uWWVd0JOjaoE2f1Q/18aYEO4NM93n
eLUi8RiW6LerW2RLaSFqzUadV5RyANp19UdE5rIlgadE9XzX6vf6LCj3xmZVTrV+
9w97RWsrqWpm3OiMEVL7gFeRgYyV4WcVaYWtmzYok8WOJJN9qGX+oUBaeiBMWula
sSEVcVeTzAhzjwbArPCn4ZBizX8nb3G0skGaHpobD5afBygw5tf/wo2lRMAXOb9z
VyVzgP0iL7W9kOUoaTRiInFkdRPcdXuo0skg/pBfaewU5M61D7LfmNEq4zjJsrdY
AN9g/VTwA7uoT0tkK6YjTjdjFiWnuBzeKGgky39VdhEe1uJempjdBDz+nfbPG2K9
uh+Cn5ojIZG11mWLpee/+nwfECeyERjzVNNjzoGf4MStjn33p7yMgSmmLbphGn9X
YlzEKiiAtMXnsYAmKFXskoHsjiEmSyYJQvyYDRJZVYXOCYX0zsAd4cKBbwiJ544m
lbvDwo5Jjw==
=MZjz
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFvMUEACgkQmmx57+YA
GNmZhRAAjJa2S4Ggle+FmKnhubdeAPw8Q1G//Mq4xJbdxNrzDTgg9kNONbIUes+K
FaQ9ok4Ql5jo4VorI0l8g4I6h+IfMJm3FfWrirm4SbSTkmCJa9g7+DJHyfBqsGCv
VMrY+FVY1rfRCilT2aRU/1D6hzexHjxRVdR66Zr5Ry6xGWuu7AP4cz2Rv/NMw7FO
vHZasX+7KAKTGCJ4wYDAUeN67tImt2ykRKC+OCST46tWHyuUkqJEVNHFnHHfgN0/
hXMAXCWs4gL6CAeBhWEfEs38LgzzEwWodD+lS/uZwjF95q8Ns1ujfWJpaY+XWVvU
TT+h+02770O/C6uROIOxZbVISM2R6WP6w6+Jyjk5HjPwXO0TfYXN8xgf8Vkqtw/8
nWuN9qwfku23AMuDftTVlcIy4pPmYhM1O8xd/31voQWFGEEcgTSfP9DRi2ANwkAY
/yDScK49q1jAylx/HvVbVkKyZA3HXAhqk4sQw9/7zT3KDG0pVVKzGuVU6C8AdzLk
CyueUL2tWd/4seowWlsSB1knCqVAgFXtMxTjDy5QwSnreXcJwLOIKfAusDGm76ur
6+YEflIwm6bAckmb/VnLsRdIWizXLl8V/dtDQx9mBjUUlWD64BZemRZZyTkWrGtA
CCfUrpAoegWe7Um44ZSxjF6M0c5q+E4IUSIfir01hL+m8eBHSR4=
=Bj2z
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.16
1. Match Exynos5433 DTS with dtschema.
2. Add an Exynos Auto v9 SoC and SADK board. The Exynos Auto v9 is a
design for automotive for In-vehicle Infotainments (IVI) and Advanced
Driver-Assistance Systems (ADAS).
This pull request brings very basic support (pinctrl, UART and UFS
storage) with a development SADK (Samsung Automotive Development Kit)
board.
* tag 'samsung-dt64-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: add minimal support for exynosautov9 sadk board
arm64: dts: exynos: add initial support for exynosautov9 SoC
arm64: dts: exynos: add proper comaptible FSYS syscon in Exynos5433
arm64: dts: exynos: align operating-points table name with dtschema in Exynos5433
Link: https://lore.kernel.org/r/20211013162418.43072-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
MSM8916 gained some DT cleanup fixes. The Dragonboard 410c gains updated
firmware paths to the device specific firmware for modem and WiFi, to
allow these to be pushed to linux-next. The Longcheer L8150 gains extcon
support and the interrupt configuration for the accelerometer and
magnetometer are corrected.
MSM8998 gained descriptions for the multimedia clock controller and
iommu, as well as the GPU and its dedicated IOMMU. The QFPROM node is
updated to access the CRC corrected value space, the white LED (for
backlight) found in PMI8998 is described and GCC gains references to the
missing XO and sleep_clk reference clocks.
On top of this initial support for the Fxtec Pro1 QX1000 is added and
then the Sony Xperia XZ1, Xperia XZ1 Compact and the Xperia XZ Premium,
with USB, touchscreen, SDHCI, Bluetooth and vibrator supported.
The Xiaomi Mi 5 and Xiaomi Mi Note 2, based on the MSM8996 platform was
added, with support for frame buffer, GPU, audio, video encoder/decoder
and touchscreen.
The USB controller and PHY found in IPA6018 is described to provide USB
support. IPQ8074 gains a description of the SPMI controller.
The highlight on SC7180 is the introduction of the just released
"Homestar" device. CPU power coefficients are corrected based on
measurements, IMEM is described to ensure that remoteproc relocation
information is carried to post mortem debug tools and a few smaller
fixes are introduced.
The SC7280 gains QSPI, low speed (i2c/spi/uart), GPU, thermal zones,
modem, CPU topology and updated memory map.
On SDM845 the "Limits hardware" is described and increases the
throttling temperature of the hardware from ~70C to 95C, with up to 30%
improvement in benchmarks as result. Relying on hardware throttling and
thermal pressure, the CPU cooling devices are dropped.
The power for the second WiFi channel is properly described for the
Lenovo Yoga C630, to ensure they are both powered.
reboot-modes are defined for the PM660 PMIC, found in SDM630 and SDM660.
Initial support for the Snapdragon 690 (aka SM6350) is introduced, with
support for clocks, regulators, pinctrl, storage, thermal sensors, USB,
SMMU and CPUfreq. On top of this support for the Sony Xperia 10 III is
introduced.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFmFhUbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FJe8P/080MWq7pknxqFT46bSN
FbrK7Hd/TVly3Lx+aWmhyyAIl2qcsD0oEs8bB61j9bCTD4RWfRNSLNMv4/QNWeni
LqXaJZJzoCxMq+F9h1NAZcDoZrUb3/yz5EZDh/3kRU4bJ+TNQSmRxRA30Elv7FEr
TQuqWdSYe1laWS/j687lQ099TaHo7k06pR0JSiRK5QSeGYp/L65xc1ys/D7SthZA
cK21++sKo26W3r1rmIuSPUWONF+LYiT04dTk8vO+X7RfzW8C7onuqN/cWhe+nb+h
JMxnvup7h542Wh/6TpgNAGa2ikxXEZHP1NA6WVhcp6CdGRjE+2CYHCzX11IJA09Y
26GsLu6Vtd7BN/kxdxs99h45PuZlt1WurnTUCUHqlCXqZx9mSRtSZpnJAMdGCiOS
qmWkAukFTqde48TzvhjdW9OejVPzUGsWthtFYoImM3Sywg7nlRPw6HAZQNAlcVU4
RwwLV4lDEMxofliXb15hjxpA4hzhyPebQ6JQmrl/e29RKj/TPwpx/C5N1XacJjX4
2QYq25dzEUaZNK2XiO5BL99jl9zGUdDRDGpPzey2/XaVBF0cgcDNf65jqtBrk/Yp
+WPcv2Q+EGcgCYJE2JalFyk6YhkLV/Qj7Fo04BKP9OF6p+EKyMq66hM9WXIkjvuK
QCt16FsrcTip5Whzcuqbt/lT
=nWS9
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFvLHYACgkQmmx57+YA
GNnnWQ//XBbJhCfn2m3OG5+vhtuMf3+PqkBph4/UUpHhMn7nM/UDfVvnkFo8NPYS
wy3QaUsJ1jncdHiVxypjF4w6+c5sAi4jU3Mz48vJwyDt0UA6zg7Odb9h4vzt6PCI
v7eqdSPe5JHrrxmIcTsyhqV5s/3ozWvnq3gy5kabtdYffMz/IsccNF9LhXaOAiHh
weCHPR2IGNpiaKSRx92Se+zHLw0Whzmx27k8+t6kg4MkiiZQQxbu2vNx1KVYEhMY
sOkHdiEqjd8hRCMXXn7KOTnkJYQwCjLWeMcBSo9LDGy0dmxIol/2v378b5vWiYRh
43zBqL9w7nu+lZkW+Qur8319Squ+WsKz0sDCvMZ2k5IZLnKWGeMuUpU40Bdsf8iD
yQ/YyCcBehgWJ0X0uXDuL5az31YNUHuzA0qvc9TNhaRBEG7R95ZbSs7QIDnGGeW2
5FdA4UhpT4p1SvhJ+a2ev3GJtgmuw3+kPwXGY+CIEFbNLSY+mpLaH5sxjrSUxyJg
wyEPQSuFwFD4FzlXUZ8Ccpn2eVnjJe9zxWv+5Wm2ne0ORM1Zcm6L0wvxAroSl1H3
WB5ACCoPSQhdpQ7G/Sie5dbzYO9owZ6o3BSgGXGubT/QJuCvFvqtMehKjv/ZjTk9
vY6Y9U6ULHK514Dku/TMWJuZv0tLhNMXyfEPCu7JPk9797fAWAE=
=fbG2
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm ARM64 dts updates for v5.16
MSM8916 gained some DT cleanup fixes. The Dragonboard 410c gains updated
firmware paths to the device specific firmware for modem and WiFi, to
allow these to be pushed to linux-next. The Longcheer L8150 gains extcon
support and the interrupt configuration for the accelerometer and
magnetometer are corrected.
MSM8998 gained descriptions for the multimedia clock controller and
iommu, as well as the GPU and its dedicated IOMMU. The QFPROM node is
updated to access the CRC corrected value space, the white LED (for
backlight) found in PMI8998 is described and GCC gains references to the
missing XO and sleep_clk reference clocks.
On top of this initial support for the Fxtec Pro1 QX1000 is added and
then the Sony Xperia XZ1, Xperia XZ1 Compact and the Xperia XZ Premium,
with USB, touchscreen, SDHCI, Bluetooth and vibrator supported.
The Xiaomi Mi 5 and Xiaomi Mi Note 2, based on the MSM8996 platform was
added, with support for frame buffer, GPU, audio, video encoder/decoder
and touchscreen.
The USB controller and PHY found in IPA6018 is described to provide USB
support. IPQ8074 gains a description of the SPMI controller.
The highlight on SC7180 is the introduction of the just released
"Homestar" device. CPU power coefficients are corrected based on
measurements, IMEM is described to ensure that remoteproc relocation
information is carried to post mortem debug tools and a few smaller
fixes are introduced.
The SC7280 gains QSPI, low speed (i2c/spi/uart), GPU, thermal zones,
modem, CPU topology and updated memory map.
On SDM845 the "Limits hardware" is described and increases the
throttling temperature of the hardware from ~70C to 95C, with up to 30%
improvement in benchmarks as result. Relying on hardware throttling and
thermal pressure, the CPU cooling devices are dropped.
The power for the second WiFi channel is properly described for the
Lenovo Yoga C630, to ensure they are both powered.
reboot-modes are defined for the PM660 PMIC, found in SDM630 and SDM660.
Initial support for the Snapdragon 690 (aka SM6350) is introduced, with
support for clocks, regulators, pinctrl, storage, thermal sensors, USB,
SMMU and CPUfreq. On top of this support for the Sony Xperia 10 III is
introduced.
* tag 'qcom-arm64-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (99 commits)
arm64: dts: qcom: sdm630-nile: Correct regulator label name
arm64: dts: qcom: sm6125: Improve indentation of multiline properties
arm64: dts: qcom: msm8916-longcheer-l8150: Use &pm8916_usbin extcon
arm64: dts: qcom: pm8916: Add pm8941-misc extcon for USB detection
arm64: dts: qcom: pm8916: Remove wrong reg-names for rtc@6000
arm64: dts: qcom: sc7280: Update Q6V5 MSS node
arm64: dts: qcom: sc7280: Add Q6V5 MSS node
arm64: dts: qcom: sc7280: Add nodes to boot modem
arm64: dts: qcom: sc7280: Add/Delete/Update reserved memory nodes
arm64: dts: qcom: sc7280: Update reserved memory map
arm64: dts: qcom: msm8998-fxtec-pro1: Add tlmm keyboard keys
arm64: dts: qcom: msm8998-fxtec-pro1: Add Goodix GT9286 touchscreen
arm64: dts: qcom: msm8998-fxtec-pro1: Add physical keyboard leds
arm64: dts: qcom: Add support for MSM8998 F(x)tec Pro1 QX1000
arm64: dts: qcom: msm8916: Fix Secondary MI2S bit clock
arm64: dts: qcom: msm8916-longcheer-l8150: Add missing sensor interrupts
arm64: dts: qcom: sc7180: Add IMEM and pil info regions
arm64: dts: qcom: pm6150l: Add missing include
arm64: dts: qcom: sm6350: Add device tree for Sony Xperia 10 III
arm64: dts: qcom: sm6350: Add apps_smmu and assign iommus prop to USB1
...
Link: https://lore.kernel.org/r/20211012231155.1036519-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This extends the previous limited description of MSM8226 with SDHC,
UART, I2C, SCM, SMEM, RPM and basic PMIC definitions. Based on this,
initial support for the LG G Watch R smartwatch is introduced.
APQ8064 gets a couple of DT updates, one which will allow the GPU driver
to drop supporting legacy "opp tables" in the future.
DT bindings and DTS files are updated with additional compatibles, for
completeness.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmFlyMwbHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3F6v0P/17moA0ag9bouNejiVbz
qEYqDobqi6YvdEv8bDMcbHZKe7WpWy3eW304pp8gKj/u7E05rNdNAi45bZZ697Zt
BhisknGupCw0+WjKVViAG7jSi7wVuBHyxJ5Y9e/iwItpmLaApQkW7/1lMIegOlsY
BboFsHgRnflFO6fBg5LRhRPwFxZG0x1GRjtTYH4LiG8bOUa6TJy+/V+Wj8UTOspL
ntmfFd295S4tm92XEYWhvIqKCrYLrn4/HQ5P9nB0kRFpPS7VX5C96a3t+vY9wSin
IZwX+p4BsdnIG2ZucGKbEH+9PnWqrH1hmFJVLu99s/PulOd2GGEtWZeW3JongLp6
R42JTx+nmFD4yCzL34qSVUEschcNaprSwqZLesJcFcXR1ZJ86Eo5S/8DMbmpscXT
uIDkhTNTsoOVSpjZ5ZKfok2J9lpKl+FmpST25FuNapUmuAkgvJapipRk6DkXyT0r
jAmTrSBRFAFcWY9isikKPPp97MuXguX+rHv+8Ki+K1ePfU+/8CftFIwlg8z6TfvY
tUugn5K3xXrRBgR/WWH+6VJF9mq/XTCeaAlvmJzDlnTE/z2qGCrgQLKeH9vWTwT3
uBG9dP+YhDvhXXWLU00W8xhSN/yb+riU2jj3FElhREmHL5B0/cKM2Hf1X5ugGImV
2XKdAwuXcqJT9NpGgxuyL/KD
=x0TI
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFvLEIACgkQmmx57+YA
GNl7tQ/5AVaJo5EQ+EUSq/410r2S+8EdSK/NIxhQ3DQNkvmqfsNQwg+AawrX9MDD
GwGvWo0vcOKJxV0XR3R9tHEJn/AKTT+s4qop/khRE3SNWP6+T6fPpcB5wjzS0Y15
Tz/Nz0L6AGL4k0woDJQYLau7yFMIbGi+HdWzKTfztR1fOKBUPc8EQ5jxQKW0I78C
Rc+o0+GvZxGejLq/400axhFR8+vHKtU+aUc6mdpmfl3mBLXBAUH8kD8tBdySgGsv
Li408VgADL036X6vXLG1ScNcREsGB+nw/lzb9JQfXXYkv/aNN37f/YXZUNWgdaQF
8jJRIMmVsB6nfUmoKCcJVb50/YCzAJYJqS7P+Z0v586DgxPUqaxD5pqPdze2/kz0
Qhfu4959yBUd0YdaFgMm2UanqbyMYI0gux5EsCxTNsPhd8qRThSLiCr7zoqTK2pE
ksbdUUiNftcHpVnXMyeepK9XENfvnD1ROcdC209Mh0c+EGTE+3b7gqUV75NRYYW6
Ek0N0w2h6tOGci/Q+rwk09JunqefjLViNjRcz/QSMV4feuw7ck/+1Hm8u+ydFqOa
u5DgvLVaXLIslrMz7bCO7eGpY5KHomsKbPx7c4UmTTH/nN/DQMOLsaf4RmDa1ROW
7Rjiwc9rCV+uZ9ET3ZNmGOyIkgguTksRFSidEXTdeqYKIhuFXms=
=ur86
-----END PGP SIGNATURE-----
Merge tag 'qcom-dts-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt
Qualcomm DTS updates for v5.16
This extends the previous limited description of MSM8226 with SDHC,
UART, I2C, SCM, SMEM, RPM and basic PMIC definitions. Based on this,
initial support for the LG G Watch R smartwatch is introduced.
APQ8064 gets a couple of DT updates, one which will allow the GPU driver
to drop supporting legacy "opp tables" in the future.
DT bindings and DTS files are updated with additional compatibles, for
completeness.
* tag 'qcom-dts-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
dt-bindings: arm: qcom, add missing devices
ARM: dts: qcom: msm8974: Add xo_board reference clock to DSI0 PHY
ARM: dts: qcom: fill secondary compatible for multiple boards
ARM: dts: qcom: apq8064: adjust memory node according to specs
ARM: dts: qcom: apq8064: Convert adreno from legacy gpu-pwrlevels to opp-v2
ARM: dts: qcom: Add support for LG G Watch R
dt-bindings: arm: qcom: Document APQ8026 SoC binding
ARM: dts: qcom: Add pm8226 PMIC
ARM: dts: qcom: msm8226: Add more SoC bits
dt-bindings: arm: qcom: Document SDX65 platform and boards
Link: https://lore.kernel.org/r/20211012174310.1017857-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- move dt-bindings reset controller includes to correct folder
- split PCIe node to use new format for mt2712 and mt7622
- mt8183: add audio node to chromebook devices
- mt8192: add clock controller node
-----BEGIN PGP SIGNATURE-----
iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmFj7sMXHG1hdHRoaWFz
LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH4fRw//bYNU+512ppC+TvlN12anu/8Z
toognw+j1l1C6DzJThsPymlqfa/l1oYdv9WWvwXJYD8hBnovB4z3f9OJpU8KfYl1
IRNDNlE4JP710lJ4mmLZESrtaOeemG+RguecPUTNROLwKTc7k/ueeH7Vrm/yNx0L
SIFMHs02EM4YL54LzQsX4ZgUWwt969mLIArOSCe9oTSF1UZwBHNwQKvN3Pwr3lOz
X48T+4MpaNqkh5w4XCzcY679da+JC52Oee2iSXaepQutsWCKeODWcBoE2Biz9YiV
DqejYiPNTtziqyZL6PokNT9VtCjG393A/DGQwC/ekTBV3M172QGLQKSJUwcOdVkd
KQAVoljRxk4eBOgD2Lk0G68UkeNudjBCnzh/1piHRTHJrYGNlVjuZx0JnXKLNfiW
S/+LtPpl5OIhOm2eOTzdCNL0BRyNYCXCf9G/z0ctSXR/eQWygVoERV0ICaB4DSmO
C9VQv2g/4JjfU7iQzXcRRHX7oL8rtsZERLjnotFyFjnP4uWB44qkrKPmNYBRfpo5
hBmrDTeeSt4bhk5qYR9kqcMvGSa0q9ERH2ibTg0vBCXkkHs/yMYExPRmlydg6o47
fZTvzv8Vy3ig4yI4dbyTxpGD8R+1yUazkU/cKYByVjKiGakjOc+Y3wsEbQG9d0W2
dtPc26F5Fnj88HoWy7s=
=9lk3
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFvLAgACgkQmmx57+YA
GNmQQxAAv3UZ+FO3xeBtDgdy/WGbmqHIKrlNN9SGoGR0N7zafjv67pzVBr3ZrKoH
vlFkkxjGrioMFvzgCTyg0v4mPznhSM1/FTGBM/Rs+V2DT0BCeCE82ZgTMJt9pGcH
lNINC519MCXgzUaeyI3legu+81VcgoI+bH3Lt87Jop2kfCFiob09YbxuvoLFJKeW
ZfFEiLtNCovDV9o/kKALLuK2LIYfaiwcYWwawD4tnJQ641CRIEGhITtV9oty5X3G
kwVUx9iWB5Utm1Z80R8E0gSnKuP33eOHp1wwWsT/KdX3lWeMxg0yStoFu+YQ4v2+
vXry2FgpoHu2Y3hSROcHUxk9kUXM0xRYhibuo1LumoQx+IzO4eLAFzaU95yUZVt2
mAM5cmTH6acpQ9YKXzQOAzDdXNNX/45lhh5Z/Add8rh2JkGTLcOAYmf3GEbldTQN
si711Q2DETSDO7Ufm3H22DIJT34J+GcSX+dx1FpZYtJmzh0FkqaIAs+kSp2KpCCl
tYcqdFp0hQOlZRuBalZJXBhSeDC3XbKjUY7P56UMhvh45XqvdeGUY0lsPk0Breji
oxGeuLwmYDD9F75vOrKVJcsvL/DUztpK0kvn0Wm8mle/ks6LUIIvRbkbmCSUWImb
sKN/QEZOQ9m9DOyLVbqOjokiAFJxN2UEiq1EhFS5pfcAeVWoJvw=
=nSdE
-----END PGP SIGNATURE-----
Merge tag 'v5.15-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt
Biggest change is, that we have now support for a reset controller inside the
mmsys. This goes inhand with changes to the driver, that you will find in the
soc pull request.
Mediatek PCI device tree binding described the root port in a wrong. The IP
actaully implements several root complex with everyone having a single root port.
We need to fix the DT in an incompatible way to describe the HW as it is. This
also fixes a problem that no IRQ bigger then 32 could be handled.
The only public available HW that is affected by this is the BananaPi R64. I'm
not aware that there is a big user base using the upstream kernel. In this
boards PCI is only used for extension cards, so I don't expect any boot problems.
- mt8173: add reset for dsi0 to mmsys
- move dt-bindings reset controller includes to correct folder
- split PCIe node to use new format for mt2712 and mt7622
- mt8183: add audio node to chromebook devices
- mt8192: add clock controller node
* tag 'v5.15-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0
arm64: dts: mt8173: Add the mmsys reset bit to reset the dsi0
dt-bindings: display: mediatek: add dsi reset optional property
dt-bindings: mediatek: Add #reset-cells to mmsys system controller
arm64: dts: mediatek: Move reset controller constants into common location
arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622
arm64: dts: mt8183: add kukui platform audio node
arm64: dts: mt8183: add audio node
arm64: dts: mediatek: Add mt8192 clock controllers
Link: https://lore.kernel.org/r/1a3d63a3-c020-3319-26f6-a2ec338cc42e@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SADK(Samsung Automotive Development Kit) is the development kit to
evaluate Exynos Auto v9 SoC. It has 16GB LPDDR4 DRAM and two
256GB Samsung UFS. This patch enables only serial console and ufs0
device.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211012002314.38965-4-chanho61.park@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
This contains various cleanup patches to 32-bit ARM Tegra device trees
and enables USB OTG mode on the Nexus 7.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmFgogYTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoQfQD/9gXKPXpHeLFbHOXCDnVllDodI0LMY2
mQm9VEtdwAyFO9n86r2mtNMFVBkE2tgTPIPcuuKG7YwopJBOkrzZDl7+1XyemU1R
MiUrJd6s8Rhqj+KF5ZBc88UKluxs+IGTtlXesRf//YPaKEaRq0gYLVaRo36Mu0Km
mqwGRqUM3K5Z3mvB23FDPfqVDJhCYyeY2/aIrzaO5W/oiS0m2NSTbsW1/WOTGCVT
NCfQVegvDDNsewX2q0dce1jRZd4tp+P3gVKSGW3yRfZcCSEiPvmYBL0xzLr8IYHN
eY6FTjdNv03CQtEzi9z28JkTbWsAr65fixN/9DmGCRLkJH4FNEEYJa4iMRwO0NsV
1lU+i4F8muzxF5ksCy3l1dhlov2GpCwXX+upTtE27wgDoCfYpFRxQ6yWPzyoy+U/
/9dSfxgZPVYVB2ravR06PWrSsYsYqInbAW0PoIYtYG2lgpRc+1A1FjcnwGP1S14d
/b23ZYbz/lEoVu7Z9tm/UuNYWHiilyrBI8K3vUKfx1n4bVim5Amk91B+XWer3OYb
xC7/XKGtw1laXDXxsA4pd/6yVIr0wwVRIJw4ZCMhRx2yPQAiMW9xiCJjU4/BOMD+
gCsTQlj1PYRu0PP4N2gHuCcXtX7XpN8+NL/zd6ZBaiEHKGQRtRVIjO4NPr9ALOmw
sd1ppS+aqpPZuA==
=kkWf
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFksu0ACgkQmmx57+YA
GNk+YA//fuazS0wWLa5BoNl9DsnmMvCyUBOep1GgPs4blYzUVDPwo8+lB9UWeeXk
IVYVB6/SSHQJHa9lykX+QM0EOA0G8CLfmDe598Aend/lztUXCqyA4N5c9XMlj6/x
TLMrm4lMEGLPAend+eBLMcDTma2sbDAHTMwsi9xCiyb3JROxjyqWgpmBfqZro1Yk
PUwAq3yamXEKjSCzf1VFp9llM7OeMvbdA0JlRd27lLjiNfJr/elN0xlaTuWiLPdo
7EU5FXnDUQ1wfEmtgGh9zLnHeXudJVT2vZa0F5R3KKnTxA7Rwu4HERZKYPhFfGS+
tA8TuKw427yLe2XwVTtvHmtsur6rwH0OxbtSM6zsHn9GHg4x0fjmgkp2CNgfuMWv
aX/1AWyEi0/02D7X/c3W48+evbPnOjtP07U9GPSVa1yem4LH5uKkxdJ+K0k74MVP
ASJMQVWDeu7uigBQtTavi+gRYV7tMp1Z+vsvrRmjxeaiXzMBjcKAvzzQ3C9Mjvk3
0gneerSdFH0L5c8bZWMyqf4Uw/owSjOIo25ShsT9mGHZx/qe+7wZ+N4loPkvlPjK
bvLjj9m1/etf45WynZ2JEIhk5kl9ZEUbX21jFTNFRjITCGcE4hznXHQI8hd1uPmW
1akUTgx4q715A01tv9NZOhdUtEGavAsUUSnoxIrnCwaxPZwpuUM=
=X0fi
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.16-rc1
This contains various cleanup patches to 32-bit ARM Tegra device trees
and enables USB OTG mode on the Nexus 7.
* tag 'tegra-for-5.16-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Remove useless usb-ehci compatible string
ARM: tegra: Remove unused backlight-boot-off property
ARM: tegra: nexus7: Enable USB OTG mode
ARM: tegra: Add new properties to USB PHY device-tree nodes
ARM: tegra: Update Broadcom Bluetooth device-tree nodes
ARM: tegra: acer-a500: Correct compatible of ak8975 magnetometer
Link: https://lore.kernel.org/r/20211008201132.1678814-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The patch uses the "dt-bindings/clock/sprd,ums512-clk.h header, which
is not merged yet. This caused a build regression, and it means the
patch was not ready to get merged anyway.
This reverts commit 23410de5796cd49abb3f9b6d377822e18298e0a0.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Addition of a new variant in the sama5d2 family: the sama5d29 with
significant updates being CAN and Ethernet controllers;
- Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were
maintained up to this moment, separately, in OpenWrt tree;
- Two more boards gained I2C bus recovery support;
- Tse850 updated with one Ethernet fix;
- Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYWQuQwAKCRAfOrpwrNPN
DP3CAQCOSNWmCOwvlWJdu7/FjsxPsPXmUyUHW0oAFF80sEkaBQEAiN6QlIDvTB9U
Cxn/wYe2zbQ+vJbqkuODTqK104OUdA4=
=Ph50
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFkoI8ACgkQmmx57+YA
GNk9QQ/9F0jWoBA1RQDZgIpBQFL/3tPbtuIpMT3nY7zGTecKEZAYjAPI104d30HK
0yVHCGlV9fAW+eHqq6szyNQhzncvz/aeUrYuyb9gffPOSvdVa3CwRxOFNu86vEWS
cTn/DzqfJ1PunP7nMppD7smWEhWyqpc7TmApkXCPyiWOLhJvCYTVf7xdqGiKvMDo
ou9eNTyeMa0Abn38rnXu3mqmHbPC4wV6EeeOsSwZhrguf3sLuFk4dGWmdYzbC4Jo
ZxTkFEFxQWZyj26lP3E91Ok+F0+BOycTfRno8WSiLUL2cQhOh/MuU9wvQatWPpZM
RW8XIx8GlFgc5ffYUSVXxSlcrjyL+6w2PxCXaak6+7lC/tTRe/vXXRSi71yb2Yxw
p+zZCI9Agves5pqTnh8TFlMzidO57xLJLDTsYUzsHJgDwJ+mv/hIdg4j84VsMSnj
T5tU0FqX9ut8xGZduICFg3UtTOn41XiJH9L87hymaheMlVUJQb3X0eV9lUg8pOv2
Bb7i/68uA+Aa0UxLRtnwfZkskXJ5Rcx0hhmcfZPKOjr3K/TLO2ZUtSQY/dcOqh4i
ogzvJTggxgYKi88OXECHjO/WV/i8JYivQzwtMkIjR9YuSEBmlNzdzX7VYk/MZOWj
xJe70iIei7pPVtqIp0D3H/0xzC5XD9SxphDsYUbCh2iFumLSFcI=
=FHko
-----END PGP SIGNATURE-----
Merge tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT #1 for 5.16:
- Addition of a new variant in the sama5d2 family: the sama5d29 with
significant updates being CAN and Ethernet controllers;
- Add support for Exegin Q5xR5 and CalAmp LMU5000 boards which were
maintained up to this moment, separately, in OpenWrt tree;
- Two more boards gained I2C bus recovery support;
- Tse850 updated with one Ethernet fix;
- Sama7g5ek gained ADC nodes and sama5d27_wlsom1 WiFi support.
* tag 'at91-dt-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: dts: sama5d29: Add dtsi file for sama5d29
ARM: dts: at91-sama5d2_icp.dts: Added I2C bus recovery support
ARM: dts: at91: tse850: the emac<->phy interface is rmii
ARM: dts: at91: add Exegin Q5xR5 board
dt-bindings: ARM: at91: document exegin q5xr5 board
dt-bindings: add vendor prefix for exegin
ARM: dts: at91: add CalAmp LMU5000 board
dt-bindings: ARM: at91: document CalAmp LMU5000 board
dt-bindings: add vendor prefix for calamp
ARM: dts: at91: at91sam9260: add pinctrl label
ARM: dts: at91-sama5d27_som1_ek: Added I2C bus recovery support
ARM: dts: at91: sama7g5ek: enable ADC on the board
ARM: dts: at91: sama7g5: add node for the ADC
ARM: dts: at91: sama5d27_wlsom1: add wifi device
Link: https://lore.kernel.org/r/20211011123438.16562-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This enables additional interrupts on the Tegra194 GPIO controller for
better load balancing and/or virtualization, adds audio support on
Jetson TX2 NX, enables the NVDEC video decoder on Tegra186 and later and
enables more audio processors that are found on Tegra210 and later.
Various cleanups across the board top things off.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmFgotUTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoaYVD/9XwbRdNCseQB/fj36HQPtyCPC8ZISd
2RHu+Jx+XN0L4aChGaM4iBi1/RxrAcFHbQb4HI8IsI0IoMgHcfNSUd+rlfUNDzEX
Wy1O3CoJa4Z8FO6i3PsRAEOCPZgudglhU5PNmnV32OoXSNSv9EzvWXI+EaZwb8fd
VHF9yuXa1CXJqz5OuVoCIK/8IopbVf4w5qlgr+SJRok+j3xVTx68eMracvoTx71R
I6kWGLk0vRfySUO8FQwi69RMqvzVH/doDiu9FZcB89OWPBCokgxQY0THLm1/A7c7
VstmsQUodwflz47drrAQoel6RsqHmpAqbn+SfxpdKwCEQBcbXTSjCqJ5zfqIBaRC
qJUb0oNB9mS2TbTZ4CQz579BcXy4FE+JW0nANO1tqkUqRa1JcJDN8P6CMJE04Dka
fCG+IWs1IRBPeLEvbgg6fpJ581pVGr+sqKiGr9FnYHwKPLXNfyX6jCvtvWsXfmAo
9u36b8kcdrAvGuEZTiumboIP81sGYYEzP4GjnOB7JjLbtUpGTllDDTuTJdSozScJ
dlEzoLNuNJDqk3Lq0GqIdy0BTyJVy+9xudD8RpP+T3vvS3PvWp4GAQoH0k3pdbtV
fLpgl8UM7uoPHKoFy80aqS0RTDoq8/818qnKLpAeurPsivu2pbLRTB29/10x8TYr
1domUAtN/S44Bg==
=rNmg
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFkmi4ACgkQmmx57+YA
GNmp6Q/9Hq2UTbGAcwfdtCyS8zazz3uyPoI6EToqyAA+FFllW6uIZrP1fo7UCjL3
U95L9n4iyGGTf8Xm4isVxZoJlIPqf61eXb6kqVhMz9BpuEEcpvQ/SZgGVnIU7hmU
rZeiQC5l2tK3o4EUrgRkLBJzY6jlcjEowRMxrjn6n7WUmdw1y1KwGe/BLC+6xrR3
/q2VZzcVtMWUR7jucwOSdUtdyTKOADRuqHe7R7zjIkmkffOa/dimyJwBjT0YXFZo
nl9W6TdLcDmu9gTTU7YAL1kvSG5kTri53jsRymBd6Tu9ZAqtaUGqqJ+b6VEf58KV
S2Q8vu6OoGZonGCEtWO5OuR08fWdK09xJKrII/7gV4GVSPKZN0zrcb/ZOmOxhgvu
UuO9UqGF45rhvgSIjyxXEAT/AKg1nIWL0x32Qex7n1sCl1M/uWLhhmWjp0aop0dK
z+Gkso2Vqsj0/MGTNQHiDmCwsR9oNgxpB1DuD7ulsofQDqKcI3VcMth+WOiUPrs0
cpr2gUpu/ZXT+yVDg2hgxiWuh+OoUa0IOC2l9iEPAehQDO/CmWuxOK+JoRH9NZFa
Cyq86xsi+x1ocGqehu3Gn5k61iSzG+S9fjjBb1DEIlM+M8Xvejex59gX7hr48gDL
WpT84s2iElQ6chDWDMgnZ3s3G1BKV6JsdcW2e6xYGuZG2Jwa1W4=
=dOYU
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.16-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.16-rc1
This enables additional interrupts on the Tegra194 GPIO controller for
better load balancing and/or virtualization, adds audio support on
Jetson TX2 NX, enables the NVDEC video decoder on Tegra186 and later and
enables more audio processors that are found on Tegra210 and later.
Various cleanups across the board top things off.
* tag 'tegra-for-5.16-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Fix pcie-ep DT nodes
arm64: tegra: Remove useless usb-ehci compatible string
arm64: tegra: Extend APE audio support on Jetson platforms
arm64: tegra: Add few AHUB devices for Tegra210 and later
arm64: tegra: Remove unused backlight-boot-off property
arm64: tegra: Add NVDEC to Tegra186/194 device trees
arm64: tegra: Add new USB PHY properties on Tegra132
arm64: tegra: Update HDA card name on Jetson TX2 NX
arm64: tegra: Audio graph sound card for Jetson TX2 NX
arm64: tegra: Add additional GPIO interrupt entries on Tegra194
Link: https://lore.kernel.org/r/20211008201132.1678814-7-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This contains the DT bindings for the NVDEC hardware video decoder found
on Tegra210 and later chips as well as a node name fix for the examples
in the Tegra194 PCIe controller (endpoint mode) DT bindings.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmFgnvwTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zoeCFD/9cJsKiAMicIQurlDVI02Dxf6VKHbxX
11z1jPWzOwBkLrvDISjpWkgN8CMuPEg2NHlZ2ei87nqqFPKWsvPVsib3iHUAy8QY
EVgI5Y56VFamH8mBmiPlSe0XB3vcdIx+3xivylDiHRRYwX/VaVl5hGi5BZM903Iv
T2/Ompq7Jyeif4yH+GOIbwS4gGVQKi+LywpYAMac1NfYWP4DrBCqLh5VyNZD5t2T
9OgDby8DrhnAtGpTOyrrQfsPo42+N1LDufP3iU7Bx28fdQWRCcth130ZABNKtOR0
4e0V21lnHlyMWZyjABuXxEX2cPy/MlSa3X9RCZsH7FJdYSZdQFzBvRnGC58PERek
I2x0JIuYmQh/3LvbRMKVKdkd3qWdKEWaaHES/i/A+gBbQloHYEIp3fkkga8SmU21
BwCMB/OtPbpRI62aXSQ6C0VHLKdqwdHHwkjpbvdo2tQQfO5MdW074hLMAQacmzIj
B7qg55bt465lL6253oCjXswN/CBlHqQ7OJNUE0EIbKsRGy4u3L9YdKPZwidn+qB2
xArO0CkybZO3shPnwvzeZ2bZ34oU3tPgAYZI8UrGDgUB/lgjKVQeDGwQb0gbKCkS
w3L+xnS7L2XbjHwXL73x0YVtUWYFVl7zvLcgDf73slOydO+2P34x6nylsNmhD19p
lZAKTDbxlsX8XA==
=TONa
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmFklpwACgkQmmx57+YA
GNnsoBAAgWmtn9EZOA4QVWwgcGoBU9BE8iEiJQe7ENupZ+ofjQvez6p57AM0phfM
b2sctz66Rba2SabBqq8fGt1zOMH3RAmnY8QNhdJX22xyLltmX7dPJV2VlTBVTOGn
p69aVgUL1cLIU7LGdUAW5fTgiu5kNLG+XsFZaIPh0iVy9tDfwFs1hYNWnasivm2u
1A/sp+NGVA/YNdvun6gU/hXOqG20YFAUxushZthDZwdspYnyB5JBkNyRC27LQknb
cJ9Y/su3PWKNZrE6e0Kcln7mhZ4303vciZfhzVrrG3HpKxu2jrowNKTbZLhJFXRp
JkCY/bhhPc9VpZPfc34tBdiU7Y7Xo44R3IdqY77/+Pi0wXpxFyY+b0rAFSqWlOag
j489y4Casg7wPebpvmhi+YtkmujpxLV455V/qb8Nyu8Zv5TNAjkb/sGDXnRsSrZl
ijNXJ40/DknbAXeXFLbhWzuuKxN6wAKGgZTPAsPVchgTDll7IULJERZlgXzc4KKg
rN0f7r00ECj0uS6Wm66+HUtPvQrTJE8w8++dhFzUXeR8mjUTUbD2TJ7XaFHlDAzQ
qUpa8UylfJvUsHvQIPQKUnNEc0jQrkAkgI5YCRa+5szIKIx/KtDCyD6AVJgGo+0c
QvK0xsU5h/U+KUjtuJG5uzOSH08U57T1F1JZVdoB/CG6lEIPkL8=
=cvhE
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.16-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.16-rc1
This contains the DT bindings for the NVDEC hardware video decoder found
on Tegra210 and later chips as well as a node name fix for the examples
in the Tegra194 PCIe controller (endpoint mode) DT bindings.
* tag 'tegra-for-5.16-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: PCI: tegra194: Fix PCIe endpoint node names
dt-bindings: Add YAML bindings for NVDEC
Link: https://lore.kernel.org/r/20211008201132.1678814-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add basic DT to support Unisoc's UMS512, with this patch,
the board ums512-1h10 can run into console.
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lore.kernel.org/r/20211008034533.343167-3-zhang.lyra@gmail.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reset the DSI hardware is needed to prevent different settings between
the bootloader and the kernel.
While here, also remove the undocumented and also not used
'mediatek,syscon-dsi' property.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.5.I933f1532d7a1b2910843a9644c86a7d94a4b44e1@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The mmsys system controller exposes a set of memory client resets and
needs to specify the #reset-cells property in order to advertise the
number of cells needed to describe each of the resets.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210930103105.v4.2.I3f7f1c9a8e46be07d1757ddf4e0097535f3a7d41@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The DT binding includes for reset controllers are located in
include/dt-bindings/reset/. Move the Mediatek reset constants in there.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20210930103105.v4.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
As defined by Documentation/devicetree/bindings/pci/pci-ep.yaml,
PCIe endpoints match this pattern:
properties:
$nodename:
pattern: "^pcie-ep@"
Change the existing ones in the DT bindings examples to avoid warnings
during DT bindings validation.
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
As defined by Documentation/devicetree/bindings/pci/pci-ep.yaml,
PCIe endpoints match this pattern:
properties:
$nodename:
pattern: "^pcie-ep@"
Change the existing ones in order to avoid those warnings:
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dt.yaml: pcie_ep@14160000: $nodename:0: 'pcie_ep@14160000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dt.yaml: pcie_ep@14180000: $nodename:0: 'pcie_ep@14180000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0001.dt.yaml: pcie_ep@141a0000: $nodename:0: 'pcie_ep@141a0000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0000.dt.yaml: pcie_ep@14160000: $nodename:0: 'pcie_ep@14160000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0000.dt.yaml: pcie_ep@14180000: $nodename:0: 'pcie_ep@14180000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p3509-0000+p3668-0000.dt.yaml: pcie_ep@141a0000: $nodename:0: 'pcie_ep@141a0000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dt.yaml: pcie_ep@14160000: $nodename:0: 'pcie_ep@14160000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dt.yaml: pcie_ep@14180000: $nodename:0: 'pcie_ep@14180000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dt.yaml: pcie_ep@141a0000: $nodename:0: 'pcie_ep@141a0000' does not match '^pcie-ep@'
From schema: Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There's no such thing as a generic USB EHCI controller. The EHCI
controllers found on Tegra SoCs are instantiations that need Tegra-
specific glue to work properly, so drop the generic compatible string
and keep only the Tegra-specific ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
There's no such thing as a generic USB EHCI controller. The EHCI
controllers found on Tegra SoCs are instantiations that need Tegra-
specific glue to work properly, so drop the generic compatible string
and keep only the Tegra-specific ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Extend APE audio support by adding more audio components such as SFC,
MVC, AMX, ADX and Mixer. These components can be plugged into an audio
path and required processing can be done. ASoC audio-graph based sound
driver is used to facilitate this and thus extend sound bindings as
well.
The components in the path may require different PCM parameters (such
as sample rate, channels or sample size). Depending on the pre-defined
audio paths, these can be statically configured with "convert-xxx" DT
properties in endpoint subnode. The support for the rate and channel
conversion is already available in generic audio-graph driver. Sample
size conversion support can be added based on the need in future.
The support is extended for following platforms:
* Jertson TX1
* Jetson Nano
* Jetson TX2
* Jetson AGX Xavier
* Jetson Xavier NX
Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a device tree node for NVDEC on Tegra186, and
device tree nodes for NVDEC and NVDEC1 on Tegra194.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add YAML device tree bindings for NVDEC, now in a more appropriate
place compared to the old textual Host1x bindings.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
BB2D is a Vivante GC 2D Accelerator.
This adds the node to the dts file within a target module node.
Crossbar index number is used for interrupt mapping.
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
Signed-off-by: Jyri Sarha <jsarha@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fix typo in pinctrl. It did only work because the bootloader
seems to have initialized it.
Fixes: ee327111953b ("ARM: dts: omap3-gta04: Define and use bma180 irq pin")
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add mandatory supply properties. The supply is always on, so it is just
a syntax issue, no functional change.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add mandatory supply properties. The supply is always on, so it is just
a syntax issue, no functional change.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Replace depreciated nodenames, fix label name to match scheme.
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Hyphens should be used in label names. make dtbs_check complains
about that since it does not match the corresponding pattern
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Switch the compatible for the am33xx_pinmux pin controller node from
pinctrl-single to pinconf-single. The only change between these two
compatibles is that PCS_HAS_PINCONF will be true. This then allows
pinconf properties to be utilized.
The purpose of this change is to allow the PocketBeagle to use:
pinctrl-single,bias-pullup
pinctrl-single,bias-pulldown
This dts already defines these properites for gpio pins in the default
pinctrl state but it has no effect unless PCS_HAS_PINCONF is set.
The bias properties can then be modified on the corresponding gpio lines
through the gpiod uapi. The mapping between the pins and gpio lines is
defined by gpio-ranges under the gpio controller nodes in am33xx-l4.dtsi
Signed-off-by: Drew Fustini <drew@pdp7.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Two carveout reserved memory nodes each have been added for each of the
other remote processors devices within the MAIN domain on the TI J721E
SK boards. These nodes are assigned to the respective rproc device nodes
as well. The first region will be used as the DMA pool for the rproc
devices, and the second region will furnish the static carveout regions
for the firmware memory.
An additional reserved memory node is also added to reserve a portion of
the DDR memory to be used for performing inter-processor communication
between all the remote processors running RTOS or baremetal firmwares.
8 MB of memory is reserved for this purpose, and this accounts for all
the vrings and vring buffers between all the possible pairs of remote
processors.
The current carveout addresses and sizes are defined statically for each
rproc device. The R5F processors do not have an MMU, and as such require
the exact memory used by the firmwares to be set-aside. The C71x DSP
processor does support a MMU called CMMU, but is not currently supported
and as such requires the exact memory used by the firmware to be
set-aside. The firmware images do not require any RSC_CARVEOUT entries
in their resource tables to allocate the memory for firmware memory
segments
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210929081333.26454-5-sinthu.raja@ti.com
Add the sub-mailbox nodes that are used to communicate between MPU and
various remote processors present in the J721E SoCs to the J721E EAIK
board. These include the R5F remote processors in the dual-R5F cluster
(MCU_R5FSS0) in the MCU domain and the two dual-R5F clusters
(MAIN_R5FSS0 & MAIN_R5FSS1) in the MAIN domain; the two C66x DSP remote
processors and the single C71x DSP remote processor in the MAIN domain.
These sub-mailbox nodes utilize the System Mailbox clusters 0 through 4.
All the remaining mailbox clusters are currently not used on A72 core,
and are hence disabled.
The sub-mailbox nodes added match the hard-coded mailbox configuration
used within the TI RTOS IPC software packages. The R5F processor
sub-systems are assumed to be running in Split mode, so a sub-mailbox
node is used by each of the R5F cores. Only the sub-mailbox node for
the first R5F core in each cluster is used in case of a Lockstep mode
for that R5F cluster.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210929081333.26454-4-sinthu.raja@ti.com
J721E Starter Kit (SK)[1] is a low cost, small form factor board designed
for TI’s J721E SoC. TI’s J721E SoC comprises of dual core A72, high
performance vision accelerators, video codec accelerators, latest C71x
and C66x DSP, high bandwidth real-time IPs for capture and display, GPU,
dedicated safety island and security accelerators. The SoC is power
optimized to provide best in class performance for industrial and
automotive applications.
J721E SK supports the following interfaces:
* 4 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x1 USB 3.0 Type-C port
* x3 USB 3.0 Type-A ports
* x1 PCIe M.2 E Key
* x1 PCIe M.2 M Key
* 512 Mbit OSPI flash
* x2 CSI2 Camera interface (RPi and TI Camera connector)
* 40-pin Raspberry Pi GPIO header
Add basic support for J721E-SK.
[1] https://www.ti.com/tool/SK-TDA4VM
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210929081333.26454-3-sinthu.raja@ti.com
This adds the devices trees for IOT2050 Product Generation 2 (PG2)
boards. We have Basic and an Advanced variants again, differing in
number of cores, RAM size, availability of eMMC and further details.
The major difference to PG1 is the used silicon revision (SR2.x on
PG2).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/cc868da8264324bde2c87d0c01d4763e3678c706.1632657917.git.jan.kiszka@web.de
The current IOT2050 devices are Product Generation 1 (PG1), using SR1.0
AM65x silicon. Upcoming PG2 devices will use SR2.x SoCs and will
therefore need separate device trees. Prepare for that by factoring out
common bits that will be shared across both generations.
At this chance, drop a link to the product homepage to in the top-level
dts files. Also fix a typo in my email address in some headers.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/31fece05f9728a852c0632985c4fa537cced4ece.1632657917.git.jan.kiszka@web.de