George Stark 09738ccbc4 iio: adc: meson: fix core clock enable/disable moment
Enable core clock at probe stage and disable it at remove stage.
Core clock is responsible for turning on/off the entire SoC module so
it should be on before the first module register is touched and be off
at very last moment.

Fixes: 3adbf3427330 ("iio: adc: add a driver for the SAR ADC found in Amlogic Meson SoCs")
Signed-off-by: George Stark <gnstark@sberdevices.ru>
Link: https://lore.kernel.org/r/20230721102413.255726-2-gnstark@sberdevices.ru
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2023-07-22 18:12:53 +01:00
..
2023-02-18 17:06:09 +00:00
2022-07-16 18:50:24 +01:00
2022-12-30 18:05:16 +00:00
2022-09-05 18:08:34 +01:00
2022-07-18 18:29:29 +01:00
2023-05-30 21:07:15 +01:00